VHDL Issue Number:      0139
Classification:         Language Definition Problem
Language Version:       VHDL-87
Summary:                Attribute names needn't have static expressions.
Related Issues:         None
Relevant LRM Sections:  6.6, 14.1
Key Words and Phrases:  Attribute Names, Predefined Attributes,
                        Static Expressions
Current Status:         ISAC-Approved
1076-1993 Disposition:  Closed (All Issues Completely Addressed)
Disposition Rationale:  LRM is clear now, addressed in 6.6 and 14.1.
Superseded By:          N/A
-----------------------
Date Submitted:         1989/06/21
Author of Submission:   Ken Scott
Author's Affiliation:   Vantage Analysis Systems, Inc.
Author's Post Address:  42840 Christy St., Suite 201
                        Fremont, CA   94538
Author's Phone Number:  (415) 659-0901
Author's Fax Number:    
Author's Net Address:   N/A
-----------------------
Date Analyzed:          1990/10/10
Author of Analysis:     Paul J. Menchini (mench@clsi.com)
Revision Number:        $Revision: 1.9 $
Date Last Revised:      $Date: 1995/05/13 19:34:42 $


Description of Problem
----------------------
In Section 6.6, the 'attribute_name' is defined as follows:

      attribute_name ::=
          prefix'attribute_designator [ (static_expression) ]

In Section 14.1, the predefined attributes POS, VAL, SUCC, PRED, LEFTOF and
RIGHTOF do not require static expressions as their arguments.


Proposed Resolution
-------------------
Change the production in Section 6.6 to the following:

      attribute_name ::=
          prefix'attribute_designator [ (EXPRESSION) ]


VASG-ISAC Analysis & Rationale
------------------------------
The author's analysis is correct.  Section 14.1 defines the correct evaluation
time requirements for each use of the optional expression in each type of
predefined attribute.  Since no expression can be used when the attribute
designator denotes a user-defined attribute name, Section 14.1 provides
complete coverage of the neccessary restrictions on the optional expression.


VASG-ISAC Recommendation for IEEE Std 1076-1987
-----------------------------------------------
Treat the definition of attribute names as imposing no particular evaluation
time requirements on the optional expression, as proposed by the author.


VASG-ISAC Recommendation for Future Revisions
---------------------------------------------
Change the LRM to impose no particular evaluation time requirements on the
optional expression of attribute names in Section 6.6.