VHDL Issue Number:      0157
Classification:         Language Definition Problem
Language Version:       VHDL-87
Summary:                Self-referential access types are not prohibited.
Related Issues:         None.
Relevant LRM Sections:  3.3, 3.2.2
Key Words and Phrases:  <VHDL terms>
Current Status:         Submitted
1076-1993 Disposition:  Superseded (ISAC Issues Outstanding)
Disposition Rationale:  N/A
Superseded By:          1075
-----------------------
Date Submitted:         1991/03/13
Author of Submission:   Paul Menchini
Author's Affiliation:   CAD Language Systems, Inc.
Author's Post Address:  P.O. Box 13036
                        Research Triangle Park, NC  27709-3036
Author's Phone Number:  (919) 361-1913
Author's Fax Number:    
Author's Net Address:   mench@clsi.com
-----------------------
Date Analyzed:          TBD
Author of Analysis:     TBD
Revision Number:        $Revision: 1.11 $
Date Last Revised:      $Date: 1995/08/03 21:04:22 $


Description of Problem
----------------------
The following sequence of type declarations is not prohibited by the LRM, but
probably should be.

        type T;
        type T is access T;

This appears to be a problem inherited from Ada.


Proposed Resolution
-------------------
Add language to Section 3.3 similar to that of the last sentence of paragraph 2
of Section 3.2.2, which prohibits self-referential record types.


VASG-ISAC Analysis & Rationale
------------------------------
TBD


VASG-ISAC Recommendation for IEEE Std 1076-1987
-----------------------------------------------
TBD


VASG-ISAC Recommendation for Future Revisions
---------------------------------------------
TBD