VHDL Issue Number:      0161
Classification:         Language Definition Problem
Language Version:       VHDL-87
Summary:                It is unclear how to achieve "default binding."
Related Issues:         0005
Relevant LRM Sections:  5.2.2, 1.3
Key Words and Phrases:  Configuration, default binding, top-level configuration
Current Status:         Submitted
1076-1993 Disposition:  Closed (All Issues Completely Addressed)
Disposition Rationale:  Section 12.1 now EXPLICITLY states that you do not
                        need a top-level configuration declaration is
                        required to acheive default binding.
Superseded By:          N/A
-----------------------
Date Submitted:         1991/03/13
Author of Submission:   Doug Dunlop
Author's Affiliation:   Intermetrics, Inc.
Author's Post Address:  4733 Bethesda Ave #415
                        Bethesda, MD  20814
Author's Phone Number:  (301) 657-3775
Author's Fax Number:    
Author's Net Address:   dunlop@inmet.inmet.com
-----------------------
Date Analyzed:          TBD
Author of Analysis:     TBD
Revision Number:        $Revision: 1.7 $
Date Last Revised:      $Date: 1995/05/13 19:34:42 $


Description of Problem
----------------------
There is not agreement among VHDL vendors about whether or not a configuration
declaration is required to get the effect of "default binding".


Proposed Resolution
-------------------
Define in the LRM whether or not a top-level configuration declaration is
required to acheive default binding.


VASG-ISAC Analysis & Rationale
------------------------------
TBD


VASG-ISAC Recommendation for IEEE Std 1076-1987
-----------------------------------------------
TBD


VASG-ISAC Recommendation for Future Revisions
---------------------------------------------
TBD