VHDL Issue Number: 0180 Classification: Language Definition Problem Language Version: VHDL-87 Summary: VPI Issue 4 -- Same unit twice in design file Related Issues: 0196 Relevant LRM Sections: 11.1, 11.4 Key Words and Phrases: design unit, design file Current Status: Closed (Andy Tsay) 1076-1993 Disposition: Closed (All Issues Completely Addressed) Disposition Rationale: Manual was misinterpreted. Superseded By: N/A ----------------------- Date Submitted: 1991/03/15 Author of Submission: J. R. Armstrong Author's Affiliation: Virginia Polytechnic Institute and State University Author's Post Address: Bradley Department of Electrical Engineering Virginia Polytechnic Institute and State University Blacksburg, VA 24061 Author's Phone Number: (703) 231-4723 Author's Fax Number: Author's Net Address: JRA@VTVM1.CC.VT.EDU ----------------------- Date Analyzed: 1991/11/19 Author of Analysis: Stephen Bailey Revision Number: $Revision: 1.11 $ Date Last Revised: $Date: 1995/08/04 01:45:13 $ Description of Problem ---------------------- Can a package, package body, entity declaration, architecture body, etc. appear multiple times in a design file? Test File: ch08/s11/02010104.vhd Comment: One would think that the tools wouldn't care whether the same entity was named twice in the same file since one can process two instances of the same entity in separate design files. --##8B002114245FF************************************************************* -- --+ File: [SUITE.CH08.S11]02010104.VHD -- --+ Copyright: (c) 1986 by Intermetrics Inc. All rights reserved -- --+ LRM_Version: IEEE Std. 1076-1987 -- --+ Subsets: None -- --+ Description: -- --+ Test_point - (081100_020101) "A return statement is only allowed -- within the body of a function or procedure, and it ap- -- plies to the innermost enclosing function or procedure." -- --+ Test_objective (4) - Test that there may be multiple return statements in -- function body. -- --+ References: None -- --+ Instructions: None -- --+ Keywords: Return statement -- --+ Test_Results: Expect_Success. Output_Checked. -- --+ Test_Type: Locally Static Semantic -- --+ History: Created MM/MCC 7-26-89 -- Corrected KSC/VT 12-22-89 -- --+ Comments: Original file name: S-08-1-C-0001A.VHD -- Added conditional to functions to avoid "Unreachable -- statement" error. -- Thu Oct 20 08:49:48 1988 -- (David)Franke@mcc.com -- Removed use clause, changed S to SEC -- 12-September-1988 00:01:23 by David Franke(Franke@mcc.com) -- Updated to 1076-1987 VHDL, checked w/Recognizer. -- (Steve)Grout@mcc.com 20jun88 --**************************************************************************** package P is function F return BIT; end P; package body P is function F return BIT is begin if now = 0 ns then return '0' ; else return '1' ; end if; end F; end P; package P is function F return TIME ; end P ; package body P is function F return TIME is begin if now = 0 ns then return 500 PS; elsif now < 1 ns then return 33 US; elsif now < 2 ns then return 19 SEC; else return 1 MIN; end if; end F; end P ; Proposed Resolution ------------------- TBD VASG-ISAC Analysis & Rationale ------------------------------ Section 11.1 of the LRM states: "One or more design units in sequence comprise a design file. ... Design units in a design file are analyzed in the textual order of their appearance in the design file. Analysis of a design unit defines the corresponding library unit in a design library." The LRM does not state that a design unit cannot appear more than once in the same design file. Analysis ordering would result in the following library states in the analysis of the example design file: 1. No design units in the library (assume new library). 2. First occurrence of package specification P is analyzed and library unit package spec P exists in library. 3. First occurrence of package body P is analyzed and library unit package body P exists in the library. 4. Second occurrence of package specification P is analyzed replacing existing library unit for package specification P and putting library unit package body P out-of-date (obsolete). 5. Second occurrence of package body P is analyzed replacing the obsolete library unit for package body P. 6. Library now contains two library units: package specification P and package body P. Since the LRM does not preclude the existence of a design unit more than once within the same design file, such a design file contains legal VHDL. The resulting state of the VHDL design library after analysis of the design file would be equivalent to the state if each design unit were placed in a separate design file and analyzed in the same order as their appearance in the single design file. In the example above, the resulting VHDL design library would contain design units package specification P and package body P. Furthermore, these design units would contain the interface and behavior as contained in the last occurring versions of these design units in the design file. The comment below, although generally correct in conclusion, is flawed in analysis and recommendation for LRM section(s) to be changed. The most applicable LRM sections are 11.1 and 11.4. VASG-ISAC Recommendation for IEEE Std 1076-1987 ----------------------------------------------- Using the comment conclusion text: It is not an error to have two design units with the same name in a design file or different files. The last analyzed design unit will be contained in the design library as a result of the order of analysis of design units contained in a design file. It may be appropriate for future versions of the LRM to explicitly state the above recommendation. VASG-ISAC Recommendation for Future Revisions --------------------------------------------- The LRM was misinterpreted. Accept the interpretations of the VASG-ISAC Analysis & Rationale. The LRM is clear and no revisions are needed. Issue closed.