VHDL Issue Number: 0210 Classification: Language Definition Problem Language Version: VHDL-87 Summary: Guarded signals may have unguarded sources. Related Issues: None. Relevant LRM Sections: 9.5, 4.3.1.2, 4.3.3.2 Key Words and Phrases: guarded signals, unguarded sources, association, ports, out, inout, buffer, modes Current Status: Submitted 1076-1993 Disposition: Bugs Fixed, Enhancements Outstanding (No ISAC Issues) Disposition Rationale: Non-ISAC issues outstanding. Superseded By: N/A ----------------------- Date Submitted: 1991/03/18 Author of Submission: Paul Menchini Author's Affiliation: CAD Language Systems, Inc. Author's Post Address: P.O. Box 13036 Research Triangle Park, NC 27709-3036 Author's Phone Number: (919) 361-1913 Author's Fax Number: Author's Net Address: mench@clsi.com ----------------------- Date Analyzed: TBD Author of Analysis: TBD Revision Number: $Revision: 1.9 $ Date Last Revised: $Date: 1995/08/04 01:45:13 $ Description of Problem ---------------------- The final sentence of item 3 of paragraph 5, in Section 9.5 (on page 9.8) states: It is an error if a concurrent signal assignment is not a guarded assignment, and the target of the concurrent signal assignment is a guarded target. The intent of this sentence is apparently to disallow guarded signals from being driven except under the control of a guard signal. There are three holes in the LRM that allow a guarded signal to be driven not under the control of a guard signal: 1. A sequential signal assignment statement may be used to drive a guarded signal from within a process. Such statement need not be surrounded by an if statement under the control of a guard signal. 2. A sequential signal assignment statment may be used to drive a guarded signal from within a procedure. Such statement need not be surounded by an if statement under the control of a guard signal. 3. A guarded signal may be associated with a formal port of mode OUT, INOUT, or BUFFER in a component instantiation statement. Inside of the design entity associated with the component instance, the formal port may be driven by an unguarded source. Case 1 cannot be automatically checked as it is halting-problem equivalent. However, it seems reasonable to prohibit cases 2 and 3. Proposed Resolution ------------------- Disallow guarded signals from being associated with formal ports or signal parameters whose mode is OUT, INOUT, or BUFFER. This prohibition should be added to exactly one of Sections 4.3.1.2, 4.3.3.2, or 9.5. VASG-ISAC Analysis & Rationale ------------------------------ TBD VASG-ISAC Recommendation for IEEE Std 1076-1987 ----------------------------------------------- TBD VASG-ISAC Recommendation for Future Revisions --------------------------------------------- TBD