VHDL Issue Number:      0220
Classification:         Language Definition Problem
Language Version:       VHDL-87
Summary:                Time literals cannot be locally static.
Related Issues:
Relevant LRM Sections:  
Key Words and Phrases:  Time literals, locally static
Current Status:         Submitted
1076-1993 Disposition:  Closed (All Issues Completely Addressed)
Disposition Rationale:  LRM is clear now, Section 7.4 was revised.
Superseded By:          N/A
-----------------------
Date Submitted:         1991/03/21
Author of Submission:   Clive Charlwood
Author's Affiliation:   Synopsys Inc.
Author's Post Address:  1098 Alta Ave.
                        Mountain View, CA 94043
Author's Phone Number:  (415) 962-5425
Author's Fax Number:    
Author's Net Address:   crc@synopsys.com
-----------------------
Date Analyzed:          TBD
Author of Analysis:     TBD
Revision Number:        $Revision: 1.10 $
Date Last Revised:      $Date: 1995/05/13 21:53:48 $


Description of Problem
----------------------
(This was Endot VHDL LRM Trouble Report #JM14           9/22/88)

Consider the following VHDL statement:

        if (0 ns = 0.9 ns) then
          ...
        else
          ...
        end if;

Statements of this kind have been recommended as a way of allowing the model to
interrogate the time-resolution of the simulator.  However, if literals of type
time are locally static (all other types of literals are locally static) then
this intention is subverted.  The test must be treated as a locally static
expression which is evaluated at compile time (before the time resolution is
selected by the user).

There are only two consistent ways around this dilemma.  One is to rule that
time literals are not locally static.  The second is to require that the
resolution limit for time be specified at model compilation time.


Proposed Resolution
-------------------
In the Endot tools, literals of type time are considered to be globally static,
but not locally static.  The user specifies the resolution limit for time at
simulation startup.


VASG-ISAC Analysis & Rationale
------------------------------
TBD


VASG-ISAC Recommendation for IEEE Std 1076-1987
-----------------------------------------------
TBD


VASG-ISAC Recommendation for Future Revisions
---------------------------------------------
TBD