VHDL Issue Number:      0231
Classification:         Language Clarification
Language Version:       VHDL-87
Summary:                Required use of formal/actual assoc. in generic maps.
Related Issues:         None.
Relevant LRM Sections:  5.2.1.2, para. 4
Key Words and Phrases:  generic map usage
Current Status:         Submitted
1076-1993 Disposition:  Closed (All Issues Completely Addressed)
Disposition Rationale:  Section 5.2.1.2 note 1 addresses this.
Superseded By:          N/A
-----------------------
Date Submitted:         1991/03/08
Author of Submission:   Laurence Groves
Author's Affiliation:   Synopsys Inc.
Author's Post Address:  1098 Alta Ave.
                        Mountain View, CA 94043
Author's Phone Number:  (415) 962-5426
Author's Fax Number:    
Author's Net Address:   larry@synopsys.com
-----------------------
Date Analyzed:          TBD
Author of Analysis:     TBD
Revision Number:        $Revision: 1.9 $
Date Last Revised:      $Date: 1995/08/04 01:45:13 $


Description of Problem
----------------------
LRM 5.2.1.2 paragraph 4 states that

        Each local port or generic of the component instances to which the
        enclosing configuration specification applies must associated as an
        actual with at least one formal

The sentence is clear, but confusing.  Why is this restriction applied to
generics?  Consider the following code:

         1  entity E is
         2     generic (ep: integer := 1);
         3  end;
         4
         5  architecture A of E is
         6  begin
         7  end;
         8
         9  entity E2 is
        10  end;
        11
        12  architecture A2 of E2 is
        13     component C
        14        generic (ep: integer);
        15     end component;
        16  begin
        17     C_1 : C
        18        generic map(ep => 27);
        19  end;
        20
        21  configuration CON of E2 is
        22     for A2
        23        for all : C
        24       use entity WORK.E(A)
        25          generic map(ep => 25);      -- this is illegal
        26        end for;
        27     end for;
        28  end;

It is unfortunate the line 25 is illegal.


Proposed Resolution
-------------------
Rewrite the above to strike the restriction on generics:

        Each local port of the component instances to which the enclosing
        configuration specification applies must associated as an actual
        with at least one formal.


VASG-ISAC Analysis & Rationale
------------------------------
TBD


VASG-ISAC Recommendation for IEEE Std 1076-1987
-----------------------------------------------
TBD


VASG-ISAC Recommendation for Future Revisions
---------------------------------------------
TBD