VHDL Issue Number: 0235 Classification: Language Definition Problem Language Version: VHDL-87 Summary: Range of two concatenated objects of type BIT_VECTOR Related Issues: 0062 Relevant LRM Sections: 7.2.3 Key Words and Phrases: concatenation, array, BIT_VECTOR Current Status: Submitted 1076-1993 Disposition: Closed (All Issues Completely Addressed) Disposition Rationale: The subtype of the result of concatenation is now well-defined. Superseded By: N/A ----------------------- Date Submitted: 1991/03/04 Author of Submission: Laurence Groves Author's Affiliation: Synopsys Inc. Author's Post Address: 1098 Alta Ave. Mountain View, CA 94043 Author's Phone Number: (415) 962-5426 Author's Fax Number: Author's Net Address: larry@Synopsys.COM ----------------------- Date Analyzed: TBD Author of Analysis: TBD Revision Number: $Revision: 1.10 $ Date Last Revised: $Date: 1995/08/04 01:45:13 $ Description of Problem ---------------------- The LRM states that the results of the concatenation of two arrays (A & B) has the following properties: - The length of the result is the sum of the lengths of the operands [...] - The left bound of the result is the left bound of the left operand [...] - The direction of the result is the direction of the left operand [...] Therefore, given: variable A, B : BIT_VECTOR(7 downto 0); then according to the rules above, the range of (A & B) is (7 downto -8). This is immediately a problem since the index subtype of a BIT_VECTOR is defined as NATURAL, with the lower bound at 0. Proposed Resolution ------------------- Two proposals: 1) Retain the rules for length and direction. Remove the rule for left bound. Substitute a rule stating that the lower bound of the result is the same as the lower bound of the left operand. 2) Change package STANDARD as follows: type STRING is array (INTEGER range <>) of character; type BIT_VECTOR is array (INTEGER range <>) of BIT; The restriction of the index ranges of these types to POSITIVE and NATURAL contributes nothing to the user of the language and will only cause problems. VASG-ISAC Analysis & Rationale ------------------------------ TBD VASG-ISAC Recommendation for IEEE Std 1076-1987 ----------------------------------------------- TBD VASG-ISAC Recommendation for Future Revisions --------------------------------------------- TBD