VHDL Issue Number: 0239 Classification: Language Definition Problem Language Version: VHDL-87 Summary: Can a resolution function return an unconstrained array? Related Issues: Relevant LRM Sections: 2.4, 12.6.1 Key Words and Phrases: resolution function, unconstrained array Current Status: Submitted 1076-1993 Disposition: Superseded (ISAC Issues Outstanding) Disposition Rationale: Superseded By: 1062 ----------------------- Date Submitted: 1991/03/22 Author of Submission: Chuck Swart Author's Affiliation: Mentor Graphics Corporation Author's Post Address: 8500 S.W. Creekside Place Beaverton, OR 97005-7191 Author's Phone Number: (503) 626-7000 Author's Fax Number: Author's Net Address: cswart@mentor.com ----------------------- Date Analyzed: TBD Author of Analysis: TBD Revision Number: $Revision: 1.9 $ Date Last Revised: $Date: 1995/05/13 19:34:42 $ Description of Problem ---------------------- Can a resolution function return an unconstrained array? For example, is the following legal VHDL code? entity E is end E; architecture A of E is type T is array (natural range <>) of Bit_Vector (1 to 5); function F (A: T) return Bit_Vector is begin return A(A'left); end F; signal S : F Bit_Vector (1 to 5); signal S1: F Bit_Vector (1 to 10); begin end A; In section 2.4 the LRM requires that "The type of the return value of the function must also be that of the signal." It does not require that the subtypes match. Section 12.6.1 states: "For a scalar signal S, both the driving and effective values must belong to the subtype of the signal. For a composite signal R, an implicit subtype conversion is performed to the subtype of R; for each element of R, there must be a matching element in both the driving and the resolved value, and vice versa." It seems that the above code is technically legal. However, allowing unconstrained parameters as return types to resolution functions gives the user no real benefits and prevents tools from early error detection. If unconstrained arrays are allowed then the test required by section 12.6.1 can only be performed at simulation time. If the return value is required to be constrained then the test (for arrays) can always be performed at elaboration time and can often be done during analysis. Proposed Resolution ------------------- Require that the declared return value of the function have a subtype which is convertible to that of the signal. It is unreasonable that the return value have the same subtype as the signal since that requirement could force the use of different resolution functions for busses of the same type and size but with different index ranges. VASG-ISAC Analysis & Rationale ------------------------------ TBD VASG-ISAC Recommendation for IEEE Std 1076-1987 ----------------------------------------------- TBD VASG-ISAC Recommendation for Future Revisions --------------------------------------------- TBD