VHDL Issue Number:      0242
Classification:         Language Definition Problem
Language Version:       VHDL-87
Summary:                Is every library unit assumed to occur within package
                        STANDARD ?
Related Issues:         0064, 0092, 0113, 0243
Relevant LRM Sections:  Chapter 10
Key Words and Phrases:  Scope, visibility, package STANDARD
Current Status:         Submitted
1076-1993 Disposition:  Superseded (ISAC Issues Outstanding)
Disposition Rationale:  N/A
Superseded By:          1050
-----------------------
Date Submitted:         1991/03/25
Author of Submission:   Chuck Swart
Author's Affiliation:   Mentor Graphics Corporation
Author's Post Address:  8500 S.W. Creekside Place
                        Beaverton, OR 97005-7191
Author's Phone Number:  (503) 626-7000
Author's Fax Number:    
Author's Net Address:   cswart@mentor.com
-----------------------
Date Analyzed:          TBD
Author of Analysis:     TBD
Revision Number:        $Revision: 1.10 $
Date Last Revised:      $Date: 1995/05/13 21:53:48 $


Description of Problem
----------------------
The Ada LRM states in its chapter on Visibility Rules:

       "The package STANDARD forms a declarative region which encloses every
        library unit and consequently the main program; the declaration of
        every library unit is assumed to occur immediately within this
        package."

There is no such corresponding statement in the VHDL LRM.  Is this omission
inadvertent or deliberate?

There are several possibilities:

    1.  The declaration of every library unit is assumed to occur immediately
        within package STANDARD.  This solution is simple and requires no new
        semantics.  However, it imposes certain restrictions on VHDL source
        code which might be considered unreasonable.  For example, it would
        forbid an entity named INTEGER, since INTEGER is already defined in
        package STANDARD.  Under this interpretation it might also be
        considered illegal to have an architecture with the same name as its
        corresponding entity.  At least, the arguments proposed in the Proposed
        Resolution section of IR 0092 would not be valid.  If in addition,
        predefined attributes are assumed to be declared in package STANDARD,
        then even more restrictions would apply.

    2.  There is some sort of "outer scope" in which each library unit is
        assumed to be declared, but this outer scope is not package STANDARD.
        Under this interpretation, what, if anything, makes up this outer
        scope?

    3.  There is no "outer scope."  Each library unit somehow exists
        independently of any environment.

It is not clear (to me) that either interpretation (2) or (3) is consistent.
Most of the scope and visibility rules were derived from Ada which uses
interpretation (1).  It is not obvious that these rules make sense under other
interpretations.


Proposed Resolution
-------------------
Clarify the issue of whether or not some implicit outer declarative region
exists.


VASG-ISAC Analysis & Rationale
------------------------------
TBD


VASG-ISAC Recommendation for IEEE Std 1076-1987
-----------------------------------------------
TBD


VASG-ISAC Recommendation for Future Revisions
---------------------------------------------
TBD