VHDL Issue Number:      0253
Classification:         Language Deficiencies and Modeling Problems
Language Version:       VHDL-87
Summary:                Bit string literals are not very useful.
Related Issues:         None.
Relevant LRM Sections:  7.3.1, 13.7
Key Words and Phrases:  Bit string literals
Current Status:         Closed (Andy Tsay)
1076-1993 Disposition:  Closed (All Issues Completely Addressed)
Disposition Rationale:  Section 13.7 allows bit string literals.
Superseded By:          N/A
-----------------------
Date Submitted:         1992/04/25
Author of Submission:   Paul Menchini
Author's Affiliation:   CAD Language Systems, Inc.
Author's Post Address:  2 Davis Drive
                        P.O. Box 13036
                        Research Triangle Park, NC  27709-3036
Author's Phone Number:  (919) 990-9506
Author's Fax Number:    
Author's Net Address:   mench@clsi.com
-----------------------
Date Analyzed:          1994/07/27
Author of Analysis:     Andy Tsay
Revision Number:        $Revision: 1.10 $
Date Last Revised:      $Date: 1995/08/04 01:45:13 $


Description of Problem
----------------------
Section 7.3.1 of 1076-1987 states, in paragraph 4:

        String and bit string literals are representations of one-dimensional
        arrays of characters.  The type of a string or bit string literal must
        be determinable solely from the context in which the literal appears,
        excluding the literal itself, but using the fact that the type of the
        literal must be a one-dimensional array of a character type (for
        string literals) or of type BIT (for bit string literals).

Section 13.7, paragraph 4 echoes the requirement that the element type of bit
string literals must be of type Std.Standard.Bit:

        A bit string literal has a value that is a sequence of values taken
        from the predefined type BIT (i.e., a sequence of '0' and '1'). ... If
        the base specifier is 'O' (respectively 'X'), the value of the bit
        string literal is the sequence obtained by replacing each extended
        digit in the bit_value by a sequence consisting of the three
        (respectively four) values representing that extended digit taken from
        the predefined type BIT.

These paragraphs mean that only strings, and not bit string literals can be
used to supply values to one-dimensional arrays of user-defined bit types.
For example,

        use IEEE.std_logic_1164.all;

        package P is
          constant C1: std_logic_vector := "1101";      -- this is legal
          constant C2: std_logic_vector := B"1101";     -- this is illegal
          constant C3: std_logic_vector := X"D";        -- so is this
        end P;

This situation greatly lessens the value of having bit string literals in VHDL
and causes much inconvenience to the user, especially when long vectors are
used.


Proposed Resolution
-------------------
Allow bit string literals to be literals of any one dimensional character 
array type whose elements include '0' and '1'.  Specifically,

    1.  Change the second sentence of paragraph 4 of Section 7.3.1 to read:

        The type of a string or bit string literal must be determinable solely
        from the context in which the literal appears, excluding the literal
        itself, but using the fact that the type of the literal must be a one-
        dimensional array of a character type.

    2.  Change paragraph 4 of Section 13.7 to read:

        A bit string literal has a value that is a sequence of values of a
        character type that includes the values '0' and '1'. ... If the base
        specifier is 'O' (respectively 'X'), the value of the bit string
        literal is the sequence obtained by replacing each extended digit in
        the bit_value by a sequence consisting of the three (respectively
        four) values representing that extended digit taken from a character
        type that includes the values '0' and '1'.


VASG-ISAC Analysis & Rationale
------------------------------
TBD


VASG-ISAC Recommendation for IEEE Std 1076-1987
-----------------------------------------------
TBD


VASG-ISAC Recommendation for Future Revisions
---------------------------------------------
Issue closed.
LRM revised in 13.7 of IEEE Std 1076-1993 to allow  bit string literals
to be of any character array type whose element subtype contains '0'
and '1'.  They may also be of zero length.

"A bit string literal has a value that is a string literal consisting of the
character literals '0' and '1'.  If the base specifier is 'B', the value of
the bit string literal is the sequence given explicitly by the bit value
itself after any underlines have been removed.

If the base specifier is 'O' (respectively 'X'), the value of the bit string
literal is the sequence obtained by replacing each extended digit in the
bit_value by a sequence consisting of the three (respectively four) values
representing that extended digit taken from the character literals '0' and
'1'; as in the case of the base specifier 'B', underlines are first removed.
Each extended digit is replaced according to the table on the following page:"