VHDL Issue Number: 1021 Classification: Language Definition Problem Language Version: VHDL-93 Summary: Constrained arrays with negative index bounds are difficult to declare. Related Issues: 0151 Relevant LRM Sections: 3.2.1.1, 7.3.5, 13.4.1 Key Words and Phrases: Index subtypes, constrained arrays, implicit conversion Current Status: Submitted 1076-1993 Disposition: N/A Disposition Rationale: N/A Superseded By: N/A ----------------------- Date Submitted: 1991/03/12 Author of Submission: Paul Menchini Author's Affiliation: CAD Language Systems, Inc. Author's Post Address: P.O. Box 13036 Research Triangle Park, NC 27709-3036 Author's Phone Number: (919) 361-1913 Author's Fax Number: Author's Net Address: mench@clsi.com ----------------------- Date Analyzed: TBD Author of Analysis: TBD Revision Number: $Revision: 1.6 $ Date Last Revised: $Date: 1995/05/15 21:26:37 $ Description of Problem ---------------------- Consider the following constrained array declaration: type A is array (-1 to 1) of Integer; This is illegal VHDL! Consider the second paragraph of Section 3.2.1.1: For a discrete range used in a constrained array definition and defined by a range, an implicit conversion to the predefined type INTEGER is assumed if each bound is either a numeric literal or an attribute, and the type of both bounds (prior to the implicit conversion) is the type universal_integer. Otherwise, both bounds must be of the same discrete type, other than universal_integer; this type must be determined independently of the context, but using the fact that the type must be discrete and that both bounds must have the same type. The right bound is clearly of type universal_integer; therefore, so must be the left bound. However, this type is explicitly disallowed. Therefore, to what type does the index range belong? There is a further problem. Assume that the type of the index range can be determined. Then the bounds are implicitly converted to this type. Consider the last paragraph of Section 7.3.5: .... An implicit conversion of an operand of type universal_integer to another integer type, or of an operand of type universal_real to another real type, can only be applied if the operand is either a numeric literal or an attribute, or if the operand is an expression consisting of the division of a value of a physical type by a value of the same type; .... The left bound cannot be implicitly converted according to this rule. The situation is even worse when user-defined types enter into the picture: type MyInt is range -10 to 10; type B is array (0 - 1 to 1 + 1) of Integer; In this example is the (sub)type of the index universal_integer, Integer, or MyInt? Proposed Resolution ------------------- Add LRM language to allow these cases to be legal VHDL and to be unambiguously interpreted. VASG-ISAC Analysis & Rationale ------------------------------ TBD VASG-ISAC Recommendation for IEEE Std 1076-1987 ----------------------------------------------- TBD VASG-ISAC Recommendation for Future Revisions --------------------------------------------- TBD