VHDL Issue Number:      1107
Classification:         Language Definition Problem
                        ?? or Language Deficiencies and Modeling Problems? ??
Language Version:       VHDL-93
Summary:                Postponed process behave illogically at initialization.
Related Issues:         
Relevant LRM Sections:  12.6.4
Key Words and Phrases:  postponed processes, initialization, simulation cycle
Current Status:         Submitted
1076-1993 Disposition:  N/A
Disposition Rationale:  N/A
Superseded By:          N/A
-----------------------
Date Submitted:         1995/03/09
Author of Submission:   Daniel S. Barclay (for Ken Bakalar)
Author's Affiliation:   COMPASS Design Automation, Inc.
Author's Post Address:  5457 Twin Knolls Rd.
                        Suite 100
                        Columbia, MD  21045  USA
Author's Phone Number:  410-992-5700
Author's Fax Number:    410-992-3536
Author's Net Address:   daniel@compass-da.com
-----------------------
Date Analyzed:          TBD
Author of Analysis:     TBD
Revision Number:        $Revision: 1.4 $
Date Last Revised:      $Date: 1995/05/15 20:07:17 $


Description of Problem
----------------------
During initialization, postponed processes behave differently than during
the rest of simulation.

Normally, postponed processes execute only during the last simulation cycle
before time advances.

However, in the initialization phase, all postponed processes execute, even
if time will not advance before the first simulation cycle.   


Postponed processes were added to the language to allow modelers to refer
to the final values to which signals settled for a simulated time. (Normally, 
postponed processes ignore intermediate values calculated during simulation 
cycles other than the last at a simulated time.)

However, the behavior of postponed processes during initialization does not 
support this purpose.  Postponed processes are executed during the initiali-
zation phase, regardless of whether values have settled (that is, regardless 
of whether there will be further simulation cycles at time zero).


Proposed Resolution
-------------------
Postpone postponed process initialization.

First, verify that it is not a problem if it is not the initialization phase
that executes each postponed process from its beginning to its first wait 
statement.

Amend the definition of the initialization phase in section 12.6.4:  Apply 
wording similar to that of step g of the simulation cycle.  If time will
not advance between the initialization phase and the first simulation cycle,
do not execute postponed processes in the initialization phase.  

(Additionally, investigate whether the initialization phase and simulation
cycle descriptions can be combined to reduce duplication.)


VASG-ISAC Analysis & Rationale
------------------------------
TBD


VASG-ISAC Recommendation for IEEE Std 1076-1993
-----------------------------------------------
TBD


VASG-ISAC Recommendation for Future Revisions
---------------------------------------------
TBD