VHDL Issue Number:      1110
Classification:         Language Definition Problem
Language Version:       VHDL-93
Summary:                The term "object" is not well-defined.
Related Issues:         1109, 1111
Relevant LRM Sections:  4.3
Key Words and Phrases:  object, user-defined attribute 
Current Status:         Submitted
1076-1993 Disposition:  N/A
Disposition Rationale:  N/A
Superseded By:          N/A
-----------------------
Date Submitted:         1995/04/06
Author of Submission:   Daniel S. Barclay
Author's Affiliation:   COMPASS Design Automation, Inc.
Author's Post Address:  5457 Twin Knolls Rd.
                        Suite 100
                        Columbia, MD  21045  USA
Author's Phone Number:  410-992-5700
Author's Fax Number:    410-992-3536
Author's Net Address:   daniel@compass-da.com
-----------------------
Date Analyzed:          TBD
Author of Analysis:     TBD
Revision Number:        $Revision: 1.5 $
Date Last Revised:      $Date: 1995/04/14 00:08:59 $


Description of Problem
----------------------
The term "object" is not well-defined.  It is defined circularly, inconsis-
tently, and excessively verbosely.


Section 4.3 begins:

        An object is a named entity that contains (has) a value of a given 
        type.  An object is one of the following:
        
                --      An object declared by an object declaration (see 4.3.1)

This first list entry makes the definition circular.  


Section 4.3 continues:
        
                --      ...
                
                --      A formal parameter of a subprogram (see 2.1.1) 
                
                --      A formal port (see 1.1.1.2 and 9.1)
                
                --      A formal generic (see 1.1.1.1 and 9.1)
                
                --      A local port (see 4.5)
                
                --      A local generic (see 4.5)

This is excessively verbose.  All of these are declared by interface 
declarations, and these are all of the things that can be declared by
interface declarations.  Why isn't this part of the definition defined in
terms of interface declarations?  

(The wording wording "an object declared by an interface declaration," once 
updated to remove the circular reference to "object," would cover all these 
cases.)


Finally, the definition of object does not include all constants.  Constants
are intended to be objects, and user-defined attributes are defined to be 
constants, but user-defined attributes are not included by this definition of 
object.


Proposed Resolution
-------------------
Rewrite the whole darn LRM, including the following:

Design a definition of "object" that works.  Determine whether signals,
variables, etc., should be defined in terms of objects, or whether objects
should be defined in terms of signals, variables, etc.

Make use of existing definitions and facts instead of repeating or duplicating
wording verbosely.  VHDL is complicated enough as it is; we don't need 
unnecessary complexity in the LRM.


VASG-ISAC Analysis & Rationale
------------------------------
TBD


VASG-ISAC Recommendation for IEEE Std 1076-1993
-----------------------------------------------
TBD


VASG-ISAC Recommendation for Future Revisions
---------------------------------------------
TBD