Chairmans Notes ISAC Meeting, Thursday Jan 27th [These are mostly from memory (I made a few things up!), feel free to correct me if I have made any mistakes/false assumptions] ISACs GOAL Our goal is to publish a "Sense of the VASG" document by DAC 95. =============================================================== Reflector & Repository Mailing list Oz and Alex will set up a reflecor on the VHDL International machine. Until it is established sending mail to the recipients of this will email suffice. IR Repository Oz and Alex will set up an IR database on the VHDL International machine. There will be seperate areas for 87, 93 and VASG approved IRS. The VASG approved IRS will be readable by the world. The rest will be restricted to isac members. Each IR will be stored under RCS so that revisions can be tracked. Addtional thought: One day it would be good to have an email based update mechanism so that a IR can be added/updated by sending email. Also, it would be good to have the system auto-email ISACers when the IR database is updated. ON-LINE LRM Paul will make a MS-Word version of the new LRM to whoever needs it. (He was taking peoples floppy disks at the meeting and copying the files.) Paul will also work on providing an on-line ASCII version for people to "grep" and search through. We also discussed making the LRM available in various other formats (such as Frame). NO conclusion was reached. VHDL93 Issues Reports All new IRs will be filled in a seperate directory. They will use the same format as the old (87) IRs. The numbers for these IRs will start at 1000. The first job of the "reborn" isac will be to migrate the 87 IRs into this new database. Initial Work Assignments Each ISAC member will be assigned a set of IRs to review against the 87 LRM. Once this IR is analyzed then it will be either closed as fixed in 87 or closed as superceeded by an new 93 IR. The intent being that this new IR is with respect to the new LRM and not the old. Other points The new "sense of the VASG document" will as a minimum have a section by section index that overlays the LRM. Preferably we would like to publish an "annotated LRM" since this would be easier to use. THE NEXT ISAC MEETING WILL BE AT SYNOPSYS FEB 11th and 12th. Starting at 8:30am. ============================================================================= Below are the assignments for the first ISAC meeting. If you intend to come to the meeting and your name is not in the list then let me know and I will assign you work. I have decided to assign 10 IRs to each person, if you only agreed to 5 or 8 then please work on AT LEAST that number. Paul: {for i in 0 to 9; 9i+1} IE: 1, 10, 19, 28, 37, 46, 55, 64, 73, 82, Chuck: {for i in 0 to 9; 9i+2} IE: 2, 11, 20, 29, 38, 47, 56, 65, 74, 83, Oz: {for i in 0 to 9; 9i+3} IE: 3, 12, 21, 30, 39, 48, 57, 66, 75, 84, Clive: {for i in 0 to 9; 9i+4} IE: 4, 13, 22, 31, 40, 49, 58, 67, 76, 85, Alex: {for i in 0 to 9; 9i+5} IE: 5, 14, 23, 32, 41, 50, 59, 68, 77, 86, Daniel: {for i in 0 to 9; 9i+6} IE: 6, 15, 24, 33, 42, 51, 60, 69, 78, 87, Victor: {for i in 0 to 9; 9i+7} IE: 7, 16, 25, 34, 43, 52, 61, 70, 79, 88, John: {for i in 0 to 9; 9i+8} IE: 8, 17, 26, 35, 44, 53, 62, 71, 80, 89, Bill: {for i in 0 to 9; 9i+9} IE: 9, 18, 27, 36, 45, 54, 63, 72, 81, 90, Since Alex and Oz does not have the IR db set up yet, please contact Paul, Oz or Myself if you need a copy of the your IRs. ISSUE IN NUMBER SUMMARY STATUS LRM? ------ ------------------------------------------------------ ------ ---- 0001 It is not clear whether array operands for logical IA Y 0002 Repair for a variety of typographical/editorial errors. VA Y 0003 Examples in the LRM do not have a space VA Y 0004 It is unclear how to determine the resolution function IA N 0005 Visibility of architecture name in the entity aspect of IA Y 0006 Interpretation of overloaded name prefixes is unclear. An Y 0007 The semantics of component configuration are in error. IA N 0008 Are deferred constants still deferred after their full Sb N 0009 The Glossary entry for "Generic" is incorrect. IA Y 0010 The disconnection time of a guarded signal is unclear IA Y 0011 Non-commutative and non-associative resolution Sb N 0012 Can implicitly declared subprograms be attributed? IA Y 0013 Interaction of slice prefix and discrete-range directions is unclear. VA Y 0014 Can overloaded entities be individually attributed? An N 0015 Bounds and direction of certain unconstrained IA Y 0016 It is unclear what subtype checks are involved in a Sb Y 0017 Can predefined operators be attributed? IA Y 0018 The rules for package elaboration do not consider the Sb N 0019 Meanings of names in association lists are unclear. VA Y 0020 Restrictions on use of deferred constants are overly IA N 0021 Non-locally-static universal expressions must be VA Y 0022 Some non-globally static expressions are evaluable IA Y 0023 Can secondary units' position numbers be outside the IA Y 0024 What is the value of Std.Standard.Time before Sb Y 0025 Allowed variations in implementations of VHDL I/O are IA Y 0026 Meaning of a constraint on a scalar alias is unclear. IA Y 0027 It is unclear in which region a generate parameter is VA Y 0028 Map aspects in component instantiation statements are IA Y 0029 The meaning of configuration declarations is unclear. IA N 0030 Is passing a signal parameter before execution an IA Y 0031 Sensitivity of implicit processes is unclear. Sp Y 0032 Inconsistencies in the definition of I/O in VHDL. VA Y 0033 OUT/INOUT signal parameters are undefined in certain VA Y 0034 The meaning of the constraint on a scalar signal IA Y 0035 Enumeration literals, physical units, and library names Sb N 0036 The format of TextIO files is undefined in various VA Y 0037 The disconnection-specification type mark is not Sp N 0038 Evaluation of value expression in aggregates is Sb N 0039 The definitions of the attributes Last_Active, VA Y 0040 Attribute specifications are not well defined. IA Y 0041 Architecture item visibility in configurations is An Y 0042 Incorrect VHDL in the LRM Sp Y 0043 Index constraint not defined for certain aliases. IA Y 0044 A name with an access object as a prefix can be a VA Y 0045 Overloading for enumeration literals not completely IA Y 0046 When are checks on resolution functions performed? IA Y 0047 Multiple meanings for a selected name prefix are not An Y 0048 Entity aspect in default binding indication is unclear. Sb Y 0049 Exception for null array is missing in type IA Y 0050 No meaning for the direction of an aggregate IA Y 0051 May resolution function parameters be signals ? VA Y 0052 What is the value of a non-static Entity Attribute. IA Y 0053 It is unclear how Physical Literals of type TIME Sb N 0054 Is a signal active when one its drivers takes on the IA Y 0055 Why must a name in a wait stmt. sens. list be static? Sb N 0056 Unclear requirements on prefix in predefined attribute An N 0057 Named associations when invoking implicit operators is IA Y 0058 Index specification and IF generation should be illegal. IA Y 0059 Analyzer detection of static expressions containing VA Y 0060 Visibility in a binding indication positional Sb N 0061 Can aliases be used to attribute composite subelements? IA Y 0062 Concatenation is incompletely defined for arrays of IA Y 0063 ALL/OTHERS in a disconnection specification not IA Y 0064 Visibility to the right of the "'" in an attribute IA Y 0065 Ambiguous visibility of block specification in a block IA Y 0066 Certain OPEN associations and unassociated formals IA Y 0067 Definition of locally static name not valid for alias An Y 0068 Bad definition for LeftOf and RightOf attributes at IA Y 0069 Expression class of predefined attribute reference is IA Y 0070 Should type-conversion fns. match direction of data flow? Sb Y 0071 An alias of a non-locally-static name is a locally An Y 0072 Reference to a generate loop parameter in a Sb N 0073 Use of block configurations with mixed generates and Sb Y 0074 Pre-defined package TextIO contains invalid VHDL. Sp N 0075 Ambiguity as to when parameter subtype indications are Sb N 0076 Definition of package elaboration not valid in certain IA Y 0077 Passiveness of processes is not analysis-time An N 0078 May locally static array subtype have a dynamic VA Y 0079 The LRM does not specify where the universal operators IA Y 0080 It is unclear when an aggregate is of a globally VA Y 0081 The evaluation time of a range is unclear. IA Y 0082 Some globally static expressions are not evaluable VA Y 0083 Can a range constraint in a type declaration use Sb N 0084 Unclear what errors can arise during creation of IA N 0085 Subelement of a local as an actual in a binding Sb N 0086 The meaning of the direction in an index IA Y 0087 Unclear context of evaluation for formal part of Sb N 0088 Overloaded convertible operands make type analysis Sb N 0089 Reference to a formal from within its own interface An Y 0090 OPEN as operand of type conversion in association Sb N 0091 Meaning of "file object" is unclear. Sp N 0092 Visibility of an architecture body identifier An N 0093 ENDFILE definition is inconsistent with parameter Sp N 0094 Definitions of locally and globally static subtype not VA Y 0095 Composite resolved signals undefined with subelement IA Y 0096 Subtype of slice must be defined for case VA Y 0097 What does "reference" mean? Sb N 0098 What is a "one-dimensional character array type"? Sb Y 0099 When are the bounds of array subaggregates known? Sb Y 0100 The RANGE and REVERSE_RANGE attributes are not Sb N 0101 Explicit type conversion between array types is ill- IA Y 0102 The LENGTH attribute is ill-defined. Sb N 0103 The LENGTH attribute is ill-defined. IA Y 0104 Can unary operators be used as type-conversion Sb N 0105 The note illustrating the equivalent sequence of Sb N 0106 The signal updating steps of the simulation cycle is Sb N 0107 LRM definition of block statements is ambiguous. Sb N 0108 Can type information be used to disambiguate names? An Y 0109 Can type information be used to disambiguate names? An Y 0110 May library names be redefined between the analysis An N 0111 What are the semantics of duplicate library name IA Y 0112 No way to denote the region of a generate statement Sb N 0113 Scope of expanded names is unclear. IA Y 0114 Why can't concurrent procedures accept files? Sb Y 0115 When the signal attribute 'TRANSACTION was added as a IA Y 0116 Wording with regard to the termination of loop IA Y 0117 The restrictions on sensitivity lists for processes and IA Y 0118 Referring to the ancient term "NETS" instead of An N 0119 "Conditional" used when "concurrent" is meant. IA Y 0120 Extraneous '.' in Section 9.2. IA N 0121 References to obsolete terms in Section 4.3.2. IA Y 0122 Processes may still interact (in a kludgy way) through An Y 0123 The READ procedures for unconstrained array types Sb Y 0124 Conflicting passages from the LRM about limitations IA Y 0125 Disconnection specification restriction is too strong. IA Y 0126 Resolution functions get called when they needn't IA N 0127 Assuming that a type conversion function will be employed Sb N 0128 The definition of the term 'constraint' in the glossary Sb N 0129 Name space in named associations is unnecessarily complex. Sb N 0130 There's no difference between an input type conversion IA Y 0131 Default binding rules fail to consider entity visibility Sp Y 0132 REVERSERANGE should be a keyword in the language. Sb N 0133 The rules for conformance of forward declarations are Sb N 0134 The restriction that subprogram association Sb N 0135 The entity identifier in architecture and configuration Sb N 0136 The subtype of a deferred constant may not always Sb N 0137 Configurations should be ternary units. Sb N 0138 Restrict formal designators to be either a simple Sb N 0139 Attribute names needn't have static expressions. IA Y 0140 What use are LINKAGE ports? An N 0141 What should happen when there is a port clause Sb N 0142 The 'note' implies that predefined attributes Sb N 0143 Allow case-statement 'coverage' checking to be done Sb Y 0144 Allow resolution functions to have an Sb N 0145 Are recursive configurations legal? Sb N 0146 May resolution functions be overloaded? Sb Y 0147 Assignment in the form of concatenation needed. Sb N 0148 Association in the form of aggregates (and possibly Sb N 0149 More typographical and editorial errors. Sb N 0150 Independent local subelement association should be Sb Y 0151 Constrained arrays with negative index bounds are Sb N 0152 Case statement ranges must be scalar Sb Y 0153 Can targets be in the form of nested aggregates? Sb N 0154 Attributes cannot be specified in package bodies. Sb N 0155 Attribute specifications using OTHERS cannot apply to Sb N 0156 May analyzers make non-locally static checks? Sb N 0157 Self-referential access types are not prohibited. Sb N 0158 What is the allowed use of others in record aggregates? Sb N 0159 Need way to do "last value" multiplexing. Sp Y 0160 General comments on VHDL. Sb N 0161 It is unclear how to achieve "default binding." Sb Y 0162 Qualified expression checks may be too restrictive. Sb N 0163 When do buffer ports have sources? Sb N 0164 Must others associations stand alone and last in an Sb Y 0165 Bit string literals cannot be of zero length. Sb N 0166 Enumeration literal to string conversion needed. Sb N 0167 Combinatorial processes can be hard to write. Sb N 0168 The index bounds of certain concatenations are illegal. Sb N 0169 A subtype Delay would aid VHDL definition and use. Sb Y 0170 Array attributes should be allowed to be static. Sb Y 0171 Recap static names and their interaction with aliases. Sb Y 0172 Rules for non-local access to signals and variables in Sb N 0173 Mod and rem are ill-defined when they return zero. Sb N 0174 A restriction is needed on T'Val's parameter. Sb N 0175 The restrictions on the designated type of a file type Sb Y 0176 Parentage checks are difficult to verify during static Sb N 0177 VPI Issue 1 -- Can record names be static? Sp Y 0178 VPI Issue 2 -- Specifications applying to 0 entities IA N 0179 VPI Issue 3 -- Names of design units and inner decls Sb N 0180 VPI Issue 4 -- Same unit twice in design file Sb N 0181 VPI Issue 5 -- Unassociated formal ports Sb N 0182 VPI Issue 6 -- Assigning NULL to signals IA Y 0183 VPI Issue 7 -- Modes of file objects Sb Y 0184 VPI Issue 8 -- Is a TIME literal locally static? Sb Y 0185 VPI Issue 9 -- Range constraints in alias decls Sp Y 0186 VPI Issue 10 -- Entity class type vs. subtype An N 0187 VPI Issue 11 -- Is INTEGER'LOW within range? An N 0188 VPI Issue 12 -- Range direction in qual. exps. Sp N 0189 VPI Issue 13 -- Integer subtypes & operations Sb Y 0190 VPI Issue 14 -- Prefixes in USE clauses Sb N 0191 VPI Issue 15 -- OTHERS component specifications Sp N 0192 VPI Issue 16 -- Redefining predefined attributes IA N 0193 VPI Issue 17 -- Base types of constrained arrays An N 0194 VPI Issue 18 -- Use of element names within records IA N 0195 VPI Issue 19 -- Referencing ports with expanded names Sp N 0196 VPI Issue 20 -- Primary units with same name An N 0197 VPI Issue 21 -- Same-named architectures of an entity An N 0198 VPI Issue 22 -- Mutliple USEs on same declaration Sb N 0199 The simulation cycle terminates too early. Sb Y 0200 'SUCC, 'PRED, 'LEFTOF, and 'RIGHTOF are not defined on Sb N 0201 Add an optional condition to return statements. Sb N 0202 The parameters to A'LEFT, A'RIGHT, A'HIGH, A'LOW, Sb N 0203 A'LEFT's result type is anomalously described. Sb N 0204 The rules for constructing sensitivity lists neglect IA Y 0205 May slices of formals be independently associated? Sb Y 0206 'Transaction's return type should be Boolean. Sb N 0207 The bounds of array aggregates are ill-defined. Sb N 0208 The expression defining the value of a constant does Sb N 0209 May subelements and slices of procedure signal Sb N 0210 Guarded signals may have unguarded sources. Sb N 0211 The restriction that prohibits signal attributes from Sb N 0212 Specifications are unnecessarily redundant. Sb N 0213 Are interface declarations allowed at the root of a Sb Y 0214 The simulation cycle does not properly account for Sb N 0215 Library Std should contain only 1076-standard units. Sb Y 0216 Resolved composite signals are difficult to associate. Sb N 0217 Does the elaboration of a process statement create a Sb N 0218 Implicit signals are not objects. Moreover, they may Sb Y 0219 Applicability of resolution functions is still unclear. Sb N 0220 Time literals cannot be locally static. Sb Y 0221 Missing rule in aggregate variable assignments Sb N 0222 User defined attribute on function name Sb N 0223 Allowable prefixes on an expanded name Sb N 0224 Definition of 'HIGH and 'LOW in a null range Sb N 0225 Qualified expressions lead to lexical ambiguity. Sb N 0226 What do default expressions mean in interface Sb N 0227 Design unit dependencies not (strictly) Sb N 0228 May default expressions be utilized in generic map Sb N 0229 "all" and "others" of limited use in attribute Sb N 0230 Unclear definition of driving value of composite Sb N 0231 Required use of formal/actual assoc. in generic maps. Sb N 0232 Must default expressions in interface declarations Sb N 0233 Unclear definition of "resolved signal." Sb N 0234 Creation of type/subtype in integer type declaration. Sb N 0235 Range of two concatenated objects of type BIT_VECTOR Sb N 0236 Deferred constant reference before complete definition. Sb N 0237 When is an enitity bound to the library is references Sb N 0238 The grammar is un-necessarily complex. Sb N 0239 Can a resolution function return an unconstrained Sb N 0240 Can a procedure parameter be disconnected? Sb Y 0241 Certain error requirements are not well-defined. Sb N 0242 Is every library unit assumed to occur within package Sb N 0243 Scope and visibility rules for predefined attributes Sb N 0244 The meaning of a qualified expression is in dispute Sb N 0245 Direct visibility rules for USE clauses are incomplete Sb N 0246 Definition Of Resolved Signal Is Incomplete Sb N 0247 Rules for others in aggregates are incomplete. Sb N 0248 'last_value for composite has non intuitive behavior, Sb N 0249 Visibilty outside of design units is not well-defined. Sb N 0250 Checking the target type of an aggregate signal assignment Sb N 0251 Can expressions using type conversions be locally static? Sb N 0252 Short-circuit operators don't when called as functions Sb N 0253 Bit string literals are not very useful. Sb N 0254 Reading predefined signal attributes of subprogram Sb N