This is also available on the database -------------BEGINNING OF IR---------------- VHDL Issue Number: 2073 Language_Version VHDL-2002 Classification Language Definition Problem Summary index constraints and discrete range conversions from universal_integer Relevant_LRM_Sections 3.2.1.1 Index constraints and discrete ranges Related_Issues Key_Words_and_Phrases range, type, universal_integer Authors_Name Gingold Authors_Phone_Number 0 Authors_Fax_Number Authors_Email_Address tgingold@free.fr Authors_Affiliation Authors_Address1 Authors_Address2 Authors_Address3 Current Status: Submitted Superseded By: ------------------------ Date Submitted: 24 August 2005 Date Analyzed: Author of Analysis: Revision Number: 0 Date Last Revised: Description of Problem ---------------------- The above section makes such a code invalid: for i in 0 to 2 ** N - 1 loop ... However, the user may like to use such constructs, and I don't think there is rational to deny them. The work-around is to write: for i in integer range ... But this is more verbose. I think this is a real issue, since even the IEEE vital code use such invalid construct. (Of course, VITAL use other invalid construct, but this is not for VASG). Proposed Resolution ------------------- Replace "an implicit conversion to the predefined type INTEGER is assumed if each bound is either a numeric literal or an attribute, and if the type of both bounds (prior to the implicit conversion) is the type universal_integer." by "an implicit conversion to the predefined type INTEGER is assumed if the type of both bounds (prior to the implicit conversion) is the type universal_integer." VASG-ISAC Analysis & Rationale ------------------------------ TBD VASG-ISAC Recommendation for IEEE Std 1076-2002 ----------------------------------------------- TBD VASG-ISAC Recommendation for Future Revisions --------------------------------------------- TBD -------------END OF IR----------------Received on Thu Aug 25 09:56:38 2005
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