Alas! Our work is never done. Here is another IR for your consideration. VHDL Issue Number: 2096 Language_Version VHDL-2002 Classification LRM Terminology, Grammar and Typographical Errors Summary Error is ambiguous Relevant_LRM_Sections 0.2.2 Related_Issues Key_Words_and_Phrases Authors_Name Jim Lewis Authors_Phone_Number 503-590-4787 Authors_Fax_Number Authors_Email_Address jim@synthworks.com Authors_Affiliation SynthWorks Authors_Address1 Authors_Address2 Authors_Address3 Current Status: Submitted Superseded By: ------------------------ Date Submitted: 26 May 2006 Date Analyzed: Author of Analysis: Revision Number: 0 Date Last Revised: Description of Problem ---------------------- Section 0.2.2 defines error as: error: The condition described represents an ill-formed description; implementations are required to detect the condition and report an error to the user of the tool. This is does not tell us whether we will get an assertion style error or a stop the simulator error because the simulation cannot be continued. This issue seems to come from the liberal interpretation of error with respect to textio read that many implementations have gravitated to. Perhaps it is ok for the textio error to be an assertion error, but it is not ok for different implementations to do different things here. Proposed Resolution ------------------- Need to define a separate term for an assertion error and use it where appropriate. VASG-ISAC Analysis & Rationale ------------------------------ TBD VASG-ISAC Recommendation for IEEE Std 1076-2002 ----------------------------------------------- TBD VASG-ISAC Recommendation for Future Revisions --------------------------------------------- TBD -------------END OF IR----------------Received on Wed May 31 14:16:00 2006
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