[Fwd: Re: Recently submitted VHDL IR]

This is the response to an email I sent concerning
IR 2133    Submitted                       Not locally static expression 
is synthesized but not compiled for simulation

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Dear Mr Swart,

thank you for your explanation.

I have attached the VHDL module including the not locally static expression.

Please let me know if you have questions concerning the VHDL description.

________________________________
Kind regards


Design Engineer
Andres Vazquez
Embedded Hardware Systems

Guntermann & Drunck GmbH
Dortmunder Str. 4a
57234 Wilnsdorf
Germany

phone    : +49 2739 8901 160
fax      : +49 2739 8901 120
e-mail   : vazquez@gdsys.de
internet : www.gdsys.de



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-------- Original Message --------
Subject: Recently submitted VHDL IR (25-Jun-2008 2:14)
From:    cswart@model.com
To:      vazquez@gdsys.de

Andres
We have received your recently submitted IR titled:
Not locally static expression is synthesized but not compiled for
simulation.
This is IR 2133.

In order for us to correctly analyze this expression we need to know the
declarations of
InputAddressRegisterReg and cREGADDRGeneralRangeMask.
Please send us these declarations so that we can proceed.

Under the assumptions that these are both either constant bit_vectors or
std_logic_vectors I can say (unoficially) that for VHDL2002 you are
correct: the case
expression is illegal. However, I should qualify this with two comments.

First, for VHDL200X which is under ballot, this expression is legal. The
definitions
of local staticness have been expanded to meet common designers needs.

Second, various synthesis tools often accept technically illegal VHDL.
They often
put other restrictions on language features which allow them to compute
things which
aren't knowable in the fully general case. Hence synthesis tools often
accept "a superset
of a subset" of the language.

Chuck Swart
Chair, VHDL ISAC (Issues Screening and Analysis Committee)


To: vazquez@gdsys.de