Subject: notes from last meeting
From: Pryor, Duaine (duaine_pryor@mentorg.com)
Date: Wed Dec 03 2003 - 20:10:45 PST
Here are the notes I have from our face to face meeting.
Here is the list of attendees for the notes
Brian Bailey Mentor
<mailto:brian_bailey@mentor.com> brian_bailey@mentor.com
Shabtay Matalon Mentor <mailto:shabtay@cadence.com>
shabtay@cadence.com
Duaine Pryor Mentor
<mailto:duaine_pryor@mentor.com> duaine_pryor@mentor.com
Jan Johnson Mentor <mailto:jan_johnson@mentor.com>
jan_johnson@mentor.com
John Stickley Mentor
<mailto:john_stickley@mentor.com> john_stickley@mentor.com
Amadies Sun Novas <mailto:asun@novas.com>
asun@novas.com
Dave Chapman Gold Mountain <mailto:dave@goldmountain.com>
dave@goldmountain.com
Todd Massey Verisity
<mailto:massey@verisity.com> massey@verisity.com
Matt Kopser Cadence <mailto:mkopser@cadence.com>
mkopser@cadence.com
Andrea Castelnuovo ST
<mailto:andrea.castelnuova@st.com> andrea.castelnuova@st.com
Per Bojsen Zaiq <mailto:Bojsen@zaiqtech.com>
Bojsen@zaiqtech.com
Ran Avlnun Cadence <mailto:ran@cadence.com>
ran@cadence.com
Dan Soderman Asic Design <mailto:soderman@asicdsn.com>
soderman@asicdsn.com
Ranjith Kumaran Axis <mailto:ranjith@asixsystems.com>
ranjith@axissystems.com
Irit Lilberberg Cadence <mailto:irit@cadence.com>
irit@cadence.com
Tung-sun Tung Cadence <mailto:tst@cadence.com>
tst@cadence.com
Rich Newell Aptix <mailto:richardn@aptix.com>
richardn@aptix.com
The agenda was:
Agenda:
10:00 Welcome and review of agenda - Brian Bailey, Mentor Graphics
10:15 High level overview of the current SCE-API 1.0 specification
Duaine Pryor, John Stickley - Mentor Graphics
12:15 Lunch
1:15 Integrating Emulation in a system level design methodology -
Andrea Castelnuovo - ST
2:00 Retargetability with SCE-API 1.0
Per Bojsen - ZAIQ technologies
3:00 Requests for clarification and/or enhancements
4:00 Discussion on proposals for extension to the standard
5:00 Adjourn
Notes:
Morning sessions:
The next official meeting of the ITC will be the 2nd Thursday of
December.
Action: Brian B. to update the webpage
Presentations will be posted on the website.
Action: Brian B. to post
Afternoon session (general discussion around prioritization of next
steps for the committee)
General agreement that we should target the end of March for finalizing
any extensions/modifications to the SCE_API 1.0. The two major items
which have been identified by the committee include 1. Support for
variable length transactions 2. Clock encapsulation. It was also
mentioned that we may need to look at language binding work in order to
promote smooth flows for HVL's other than C. There was agreement that
we would aim for a kick-off meeting in January to discuss strawman
proposals for these extensions. Cadence, Zaiq and Mentor all expressed
interest in contributing. Cadence suggested a strawman could be
presented in the January timeframe. Closing on the extensions was
viewed as a priority 1 concern for the committee.
Action Duaine : At the next meeting (2nd Thursday of December) agree
on the date for the next face to face kick-off meeting in January, and
get agreement on deliverables for that meeting.
Discussion on the Application Layer and volunteers for Chairperson
As a starting point work in this group should include (but not limited
to)
1, Thread interoperability extensions over and above current thread
interoperability scheme if necessary.
2. Standard components such as memories, buffers, FIFOs, ...
3. Standard transaction types
4. Thin driver layers (?)
Action Brian B: will call parties who expressed interest in chairing or
Co-Chairing this group.
Irit - Cadence
Per - Zaiq
Mitch and/or Duaine - Mentor
General agreement that we need to continue in our efforts to get the
message out that the SCE_API is being recommended by the Accellera ITC
as the high performance interface between TestBenches running on the
workstation and RTL designs running on hardware platforms. This was
recognized as a priority 1 activity by group.
Actions: Get participation on the the committee from more
vendors and/or customers concerned with the writing/creation of
transactors.
- Sonics - Per Bojsen will contact
- Synopsys Qualis - Jan will contact
- Cadence IP - Shabtay will contact.
- Mentor IP - Mitch will contact.
- Spirit Consortium - Aptix will contact.
- Arm - Jan will contact
- Open Cores - We should consider sending invite to participate
in ITC standardization effort (Duaine???)
Action all above: review results of discussions at the next ITC
teleconference.
Transactor Composition/Reuse
1. Ambiguity issues should be handled in the SCE-MI sub-group
2. We should use standard Accelera process in the short term
3. In the long term, an interoperability lab would be ideal -
funding and ownership are concerns.
Connection and/or compatibility with other standards. It is a priority
one issue to sort out how the ITC is compliant with other accellera
standards, and high priority to determine compliance with other popular
standards. It was also suggested that we should specifically look at
how other standards are handling assertions and assertion consequents.
Action John S. - Create a synopsis for the group of the System Verilog
DPI standard.
Action John S. - Contact Andrea to see if he is interested and
available to create a similar synopsis for System C TLM.
Action Brian B - Determine if VSIA has a offering in this area that we
should consider, and if appropriate find a volunteer to create a
synopsis.
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