SCE-MI Transactor Definition

Hi,

in order to bind message ports one must provide a transactor name
and a port name. On p. 35 of the standard, the transactor name is
defined as the instance name of the top-level of the transactor
where a transactor is defined as a module containing a
SceMiClockControl macro immediately inside it (I take this to mean
the SceMiClockControl macro is instantiated at one hierarchy level
below the top-level of the transactor). This definition is reiterated
in a couple of places. This raises some issues:

  1) A transactor is required to include a SceMiClockControl instance
     even if it does not intend to actually do any clock control.
     In the committee we have during the recent meetings been talking
     about a class of transactors that will not do clock control.
     What of these transactors?

  2) With the proposed variable length message ports, transactors
     can take advantage of implicit clock control so do not need to
     instantiate a SceMiClockControl macro. This implies that a
     different mechanism for identifying the top-level of a transactor
     instance is required.

  3) It does not appear to be allowed to instantiate the
     SceMiClockControl macro in some sub-module. However, based on
     the definition of port name, it *is* allowed to instantiate
     port macros in sub-modules. Given 1 and 2, would it make sense
     to change the definition of transactor to not rely on the
     SceMiClockControl macro, but instead rely on an agreed upon
     parameter that identifies a module as a top-level of a
     transactor?

Per

-- 
Per Bojsen                                Email: <bojsen@zaiqtech.com>
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