RE: Pipe proposal feedback

Hi Per,

I can understand your concern.  I guess I was thinking along the same
lines you were - basically that both the H/W and S/W side are
configurable.  Perhaps it could be up to the model vendor to decide to
supply models that allow the H/W or S/W pipe depth to be configurable or
not but in my experience, different test-benches may need to be tuned
differently.  It would be nice if the user could also adjust the
configuration to tune performance.

It may also depend on how much space is available in the accelerator as
well.  Sometimes it may be a tradeoff of space vs performance if one
needs to squeeze a larger design into it.  If reducing some pipe sizes
allows the design to fit, it may be worth the tradeoff.  Perhaps the
model vendor can provide a min/max pipe sizes supported if we don't want
it to be completely flexible (the user can query for the limits and
override the default).

Regarding your second comment, yes, I would assume the max width is the
maximum width that the H/W model can handle in terms of data.
Theoretically it could be smaller and the model would have to gather
more elements.

-Bryan


-----Original Message-----
From: owner-itc@eda.org [mailto:owner-itc@eda.org] On Behalf Of Per
Bojsen
Sent: Thursday, March 09, 2006 10:03 AM
To: itc@eda.org
Subject: Re: Pipe proposal feedback

Hi Bryan,

> 2.	PIPEs should at least have the following configuration options:
>
> 	b.	H/W depth of the pipe - since this needs be compiled

I am concerned about making this a requirement since it would
impose restrictions on the implementation that I don't think are
necessary.  If we included this in the standard we would have
to define what it means in terms of behavior of the pipe.  That
is, it only makes sense to include this if it has an observable
effect on the behavior of the test.  Implementations should be
free to choose how to implement the buffering in the pipes.  They
may choose to put all buffering on the HW side, or split it
between SW and HW sides.  So setting the HW depth may not make
sense in some implementations.

> 	c.	H/W max width of the pipe - since this needs to be
> compiled

I assume this is the same as the width of the data argument
in the pipe calls on the HDL side?

Per

-- 
Per Bojsen                                Email: <bojsen@zaiqtech.com>
Zaiq Technologies, Inc.                   WWW:   http://www.zaiqtech.com
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