Brian, I would like to suggest adding IMs for the following topics. Some topics have been discussed and progress is made, others need to be resolved. But I think we should track these issues and close them once the resolution is reflected in an updated spec, reviewed and agreed to. a. Creating a Pipe object instead of using Pipe ID as an argument to a function (Jason's proposal) b. Removing any calls to SV DPI utility functions and DPI exported functions outside an imported context function c. Implementing implicit synchronization on EOM and the default during bring-up mode. d. Defining clearly buffer length (HW only or HW SW) e. HW/SW side synchronization when buffer is smaller than a transaction. f. Defining SCE-MI 2.0 terminology (transaction/message and element including EOM/EOT). g. Synchronization semantics of FLUSH for non-blocking. h. Rename pipes function calls with sceme as opposed to dpi prefix. i. What happens if the consumer doesn't listen when the producer issues a FLUSH or when its being blocked. For example what if monitor is not listened to at the decision of the test. Will this scenario create a deadlock? j. The scope of using pipes in their current form from Verilog 2001 and VHDL. Can pipes be called from Verilog 2001 and VHDL? Thanks, Shabtay ------------------------------------- Shabtay Matalon Solution Architect R&D, CVA Phone: (408) 428 5081 email: shabtay@cadence.comReceived on Tue Mar 21 19:09:32 2006
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