FW: From Bernard

Per Bojsen wrote:
> You should be able to write your transactor in a way that you do not
> lose a `controlled' clock cycle.  That would be a serious problem as
> it would amount to loss of coverage in the stimulus your transactor
> would be able to provide.  I am struggling with how to provide a
> convincing argument as to why this shouldn't be an issue.  Perhaps
> the best way is to write up a complete example?  John, do we have
> something available that would illustrate back-to-back transactions
> without dead cycles?

Hi Per,

I'd like to clarify that I see lss issues with what I would term a 
master/initiator style transactor which is dictating the sequence oif 
transactions - my concern is with slave/responders that have to obtain 
the response value from the testbench - it's there that I either risk 
multiple function calls or can't get the output signals set early enough.

I'm presently on vacation and will be back late Wednesday.  I believe 
have a very simple hybrid of APB & AHB that we use for training purposes 
which will exhibit this issue.  Once I get back I'll check this out, but 
I'd be happy to release it to indiviudal users to evaluate this issue, 
though not to place the material in the public domain.

If John has similar material we're members of the Mentor Vanguard(?) 
program if that expedites release of the material.

Regards

Bernard



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