[sv-cc] RE: Proposal for multiple statements in task or function

Sorry, that should have been proposal 284.

Regards,
Jim V.

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James H. Vellenga 978-262-6381
Engineering Director (FAX) 978-262-6636
Cadence Design Systems, Inc. vellenga@cadence.com
270 Billerica Rd
Chelmsford, MA 01824-4179
"We all work with partial information."
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] -----Original Message-----
] From: Jim Vellenga
] Sent: Friday, November 12, 2004 8:42 AM
] To: sv-cc@eda.org
] Subject: Proposal for multiple statements in task or function
]
] I have uploaded a proposal for #285. I have also specified
] what happens to the vpiFullName for objects contained
] within the artificially introduced unnamed block.
]
] Regards,
] Jim Vellenga
]
] ---------------------------------------------------------
] James H. Vellenga 978-262-6381
] Engineering Director (FAX) 978-262-6636
] Cadence Design Systems, Inc. vellenga@cadence.com
] 270 Billerica Rd
] Chelmsford, MA 01824-4179
] "We all work with partial information."
] ----------------------------------------------------------
]
]
Received on Fri Nov 12 05:42:47 2004