Modify section 10.5.3 as shown in red

10.5.3 Default argument values

To handle common cases or allow for unused arguments, SystemVerilog allows a subroutine declaration to specify a default value for each singular argument.

The basic syntax to declare a default argument in a subroutine is:

subroutine( [direction] [data_type] argument = default_value );

The default_value is any expression that is visible at the current scope. It can include any combination of constants or variables visible at the scope of both the caller and the subroutine.

The optional direction can be either input, inout, or ref (output ports can not specify defaults). The default_value is an expression that can include any combination of constants or variables visible at the scope of both the caller and the subroutine. If the default expression is unused by a call, it need not be visible at the scope of the caller. Note that default values are only allowed with the ANSI style declaration.

When the subroutine is called, arguments with default values can be omitted from the call and the compiler shall insert their corresponding values. Unspecified (or empty) arguments can be used as placeholders for default arguments, allowing the use of non-consecutive default arguments. If an unspecified argument is used for an argument that does not have a default value, a compiler error shall be issued.

task read(int j = 0, int k, int data = 1 );

...

endtask;

This example declares a task read() with two default arguments, j and data. The task can then be called using various default arguments:

read( , 5 ); // is equivalent to read( 0, 5, 1 );

read( 2, 5 ); // is equivalent to read( 2, 5, 1 );

read( , 5, ); // is equivalent to read( 0, 5, 1 );

read( , 5, 7 ); // is equivalent to read( 0, 5, 7 );

read( 1, 5, 2 ); // is equivalent to read( 1, 5, 2 );

read( ); // error; k has no default value