Section 19.2

LRM-243

Change Syntax 19-1 (changes in red and blue):

modport_simple_ports_declaration ::=

input list_of_modport_port_identifiers

| output list_of_modport_port_identifiers

| inout list_of_modport_port_identifiers

| ref [ data_type ] list_of_modport_port_identifiers

modport_simple_ports_declaration ::=

port_direction modport_simple_port { , modport_simple_port }

modport_simple_port ::=

port_identifier

| . port_identifier ( [ expression ] )

Section 19.2.3

LRM-220

Change (changes in red and blue):

This generic interface reference can only be declared by using the list of port declaration style port declaration style of reference. It shall be illegal to declare such a generic interface reference using the old Verilog-1995 list of port style.

Section 19.4

LRM-220

Change (changes in red and blue):

interface i;

wire x, y;

interface illegal_i;

wire a, b, c, d;

// x, y not declared by this interface

modport master(input a, b, x, output c, d, y);

modport slave(input a, b, x, output c, d, y);

endinterface : illegal_i

illegal_i ch1(), ch2();

modport master2 (ch1.master, ch2.master);

endinterface : i

Section 19.4.1

LRM-220

Change (changes in red and blue):

module top;

logic clk = 0;

simple_bus sb_intf(clk); // Instantiate the interface

initial repeat repeat(10) #10 clk++;

memMod mem(.a(sb_intf)); // Connect the interface to the module instance

cpuMod cpu(.b(sb_intf));

endmodule

Section 19.4.4

LRM-243

Change (changes in red and blue):

The self-determined type of the port expression becomes the type for the port. If the port expression is to be an aggregate expression, then a cast must be used since self-determined aggregate expressions are not allowed. The port_expression port expression must resolve to a legal expression for type of module port (See section 18.12—Port connection rules). In the example above, the Q port could not be an output or inout because the port expression is a constant. The port expression is optional because ports can be defined that do not connect to anything internal to the port.

Section 19.8

LRM-249

Change in Syntax 19-3 (changes in red and blue):

data_type_common_item data_type ::= // from Annex A.2.2.1

...

| virtual [ interface ] interface_identifier

Section 19.8.2

LRM-242

Change (changes in red and blue):

task drive(SYNCTB s, logic [7:0] adr, data );

if( s.sb.gnt == 0 ) begin

request(s); // acquire bus if needed

wait_grant(s);

end

s.sb.addr = adr;

s.sb.data = data;

repeat repeat(2) @s.sb;

s.sb.req = 0; //release bus

endtask