Re: Q: Analysis port binding

Since they inherit from sc_object in current implementation, I don't think they can be created after end of elaboration occurs. Am I mistaken?

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On Oct 25, 2010, at 2:45 PM, Philipp A. Hartmann wrote:

> David, all,
>
> if I understand the analysis ports correctly, it's intended to use
> bind()/unbind() dynamically during simulation. The mere existence of
> unbind() already suggests that, right?
>
> Moreover, since they are not derived from
> sc_port<tlm_analysis_if<T>,...>, I think they can also be
> created/destroyed while the simulation is running.
>
> I agree, that both features should probably be documented in the
> standard, since the name ..._port might imply the opposite.
>
> Did we agree to make tlm_analysis_port<T>::bind() virtual during the
> bind/operator() discussion? In that case, I would propose to make
> unbind() virtual as well.
>
> Thanks,
> Philipp
>
> On 23/10/10 16:53, David C Black wrote:
>> Is it legal to bind()/unbind() analysis ports during simulation? It seems to me this would be a useful thing, but it is not specifically discussed in the standard.
>>
>> Use case:
>> Turn on analysis only during certain sections of simulation.
>> Turn off to reduce overhead
>>
>> The current TLM permits this behavior, but I don't find it documented anywhere.
>
>
>
> --
> Philipp A. Hartmann
> Hardware/Software Design Methodology Group
>
> OFFIS Institute for Information Technology
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>

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