V-AMS Compact Modeling Extensions subcommittee
Minutes of Aug. 12, 2003

Attendees:
Geoffrey Coram, Analog Devices
Ilya Yusim, Cadence
Jeroen Paasschens, Philips
Colin McAndrew, Motorola
Srikanth Chandrasekaran, Motorola
David Zweidinger, Texas Instruments
Marek Mierzwinski, Tiburon
Boris Troyanovsky, Tiburon
Patrick O'Halloran, Tiburon

1) Minutes from July 29 approved.

2) Continued discussion of proposals.
Most of the discussion centered on handling of
optional terminals and possible "defaulting" of
terminals.  My example in the proposal tries to
do too many things at once; I need to split it up.
There are two kinds of optional terminals: ones
that can float (eg, thermal terminal of BJT) and
those than cannot (substrate of 3-terminal poly
resistor); we need $connected as well as defaulting
to handle both these cases.  Defaulting may be to
ground or to a different terminal.

Colin noted that present simulators that accept
Verilog-A modules in their Spice-format netlists
do not have optional terminals, though (digital)
Verilog simulators allow this in Verilog netlists.

There was some discussion of allowing $display
to take the place of $debug, but the responses
from the AMS reflector seemed to indicate this
would not be a good idea.