// ideal switch

module ideal_switch(p,n,pc,nc);
 inout p,n;
 input control
 electrical p,n;
 voltage pc,nc;
 parameter real ctr_vth=1;
 parameter integer switch_type=0;       // positive logic

 analog
    if (switch_type==0) begin
      if (V(pc,nc) >= ctr_vth)
        V(p,n) <+ 0;            // switch closed
                                // open switch modelled see 5.1.6
    end
    else begin
      if (V(pc,nc) < ctr_vth)
        V(p,n) <+ 0;            // switch closed
    end

endmodule