RE: block parameter declarations

I agree with ignoring it - but will be good to mention in the documentation that these descriptions are valid only for module level parameters.

regards,
sri

> -----Original Message-----
> From: owner-verilog-ams-devmod@eda.org
> [mailto:owner-verilog-ams-devmod@eda.org] On Behalf Of
> McAndrew Colin-rp3881
> Sent: Wednesday, May 12, 2004 5:01 AM
> To: 'Geoffrey.Coram'; VerilogA Device Modeling Reflector
> Subject: RE: block parameter declarations
>
>
>
> my vote: silently ignored.
>
> a description field could be useful for an intermediate parameter,
> at the very lest as part of code documentation. and potentially units
> could be useful to know for documentation (is Leff in um or m?)
> and perhaps consistency checking.
>
> best regards
>
> colin
>
> -----Original Message-----
> From: owner-verilog-ams-devmod@eda.org
> [mailto:owner-verilog-ams-devmod@eda.org] On Behalf Of > Geoffrey.Coram
> Sent: Tuesday, May 11, 2004 11:21 AM
> To: VerilogA Device Modeling Reflector
> Subject: block parameter declarations
>
>
> We're adding units and descriptions to parameters,
> but we really only want them added to module level
> parameter declarations.
>
> What happens if someone adds them to a block parameter
> declaration? Should this be syntactically restricted?
> Sematically restricted? Silently ignored?
>
> -Geoffrey
>
Received on Tue May 11 20:14:14 2004