Subject: Shorted ports?
From: Kevin Cameron x3251 (Kevin.Cameron@nsc.com)
Date: Mon Jan 15 2001 - 15:09:00 PST
I have a case where I have multiple ports
on a module that I want to be the same wire
internally - i.e. a short-circuit, so it
should be solved as a single net in Verilog-A
and potentially have only one A2D convertor if
I decide to use a Verilog module instead in
Verilog-AMS.
Verilog appears to support this by allowing a
port name to appear more than once.
Is the behavior the same in Verilog-A ?
Kev.
-- mailto:Kevin.Cameron@nsc.com
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