Subject: Re: Resolving timer/cross scheduling ambiguity using post timestep
From: Kevin Cameron x3251 (dkc@galaxy.nsc.com)
Date: Tue Jul 10 2001 - 11:02:41 PDT
After thinking about it further, I was wondering if the
use of '@' is causing confusion. My understanding of how
this stuff works is that the solver steps from acceptance
point to acceptance point where it re-evaluates the code.
The '@' statements indicate other times at which the code
needs to be re-evaluated but are not seperate processes
(as in digital Verilog), i.e. the entire analog block
is sensitive, and the relevent '@' statement is active
(the '@' reads like an 'if') at the time of the '@' event.
- is that correct?
Kev.
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