Subject: Re: Auto insertion of interface elements
From: Kevin Cameron x3251 (dkc@galaxy.nsc.com)
Date: Tue Dec 04 2001 - 10:54:51 PST
> > Peter,
>
> > I have appended a set of slides that hopefully answers your
> > question. Since your example resulted in no different between split and
> > merged I also modified your example to show how split would come into
> > play. Rather than using the current LRM with respect to digital
> > primitives I assumed that we would change the LRM to allow CMs to be
> > connected to them so these slides account for that. Let me know if this
> > helps or does not help.
>
> > Jon
Although your diagrams indicate where CM/IE insertion takes place (and it
looks OK), they don't indicate the elaborated relationship in the HDL or
what happens when layers of digital and analog behavior alternate.
CM/IEs need to be placed in the instantiated HDL hierarchy somewhere that
hierarchical references work sensibly.
Another example I would like to see worked through is: what happens in an all
digital hierarchy when I insert a parasitic capacitor using hierarchical references
from the top module.
Kev.
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