Re: adding NaN to Verilog-AMS


Subject: Re: adding NaN to Verilog-AMS
From: Kevin.Cameron@nsc.com
Date: Mon May 13 2002 - 20:48:30 PDT


> From - Mon May 13 20:09:50 PDT 2002
>
> I think tryhing to add an X value for reals (such as Nan) in digital code
> is a very bad idea since it will break many legacy designs that use real
> ?: operator with reg selector as part of test bench.

> Statements such as "d1 = (bus) ? 5.0 : -5.0;" need to set d1 to 0.0 for x/z bus.
>

Why? NaN would be a better result - 0.0 would imply that "bus" was valid, I
see no reason for setting d1 to 0.0 for X & Z.

The proposed change only needs to apply in analog processes at this time.

Kev.



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