Subject: Verilog-AMS annex A syntax cleanup (number and operators)
From: Graham Helwig (ghelwig@asc.corp.mot.com)
Date: Wed Sep 04 2002 - 21:17:18 PDT
Hello,
Attached is some proposed updates to the annex A of the Verilog-AMS LRM,
these updates are:
- Addition of new sub-sections to the expression section. This will help
with the migration the 1365-2001 or systemVerilog 3.0 syntax in the
future.
- Updates to the annex A introduction text.
- Updated number and operator syntax.
- Remaining syntax will be reintroduced as it is cleaned up.
For numbers, the syntax from annex A and section 2.5 of the Verilog-AMS
LRM and the annex A 1364-1995 have been merged into the proposed
syntax. The Verilog-AMS 'decimal_number' syntax was found to be
incompatible with the 1364-1995 syntax. The Verilog-AMS 'decimal_number'
was discarded in favor for the 1364-1995 syntax. Also, the number syntax
contained in section 2.5 will need to be updated.
For operators, the Verilog-AMS and 1364-1995 syntax have been merged.
Binary operators are not affected by the merge, however unary operators
are not. To make thing more confusing, table 4-4 (Verilog-AMS LRM)
refers to unary operators that are not in the Verilog-AMS
'unary_operator' syntax (e.g.. ~| and ~&). In the interim, the unary
operators that can be used within analog context expressions are
contained in the 'ams_unary_operator' syntax. Are all the 1364-1995
unary operators supported within analog block expressions?
Is there any more updates to numbers and operator syntax that has been
omitted?
Regards
Graham
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Graham Helwig email: A11558@email.mot.com
ghelwig@asc.corp.mot.com
Telephone:+61-8-81683532 Fax:+61-8-81683501
Motorola Australia Software Centre,
2 Second Avenue, Mawson Lakes, Adelaide, SA, 5095, Australia
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