Subject: Re: Minutes of the LRM committee Call - April 7th 2003
From: Kevin Cameron x3251 (Kevin.Cameron@nsc.com)
Date: Fri Apr 11 2003 - 16:44:38 PDT
> From: "Srikanth Chandrasekaran" <srikanth.chandrasekaran@motorola.com>
>
>
> Attendees - Jon (cadence), Kevin (National Semiconductors), Geoffrey
> (Analog devices), Sri & Graham (Motorola)
>
> * Geoffrey raised the issue of how the Device Modeling subcommittee (as
> discussed in the previous call) would be organized. The decision was for
> interested people wanting to work on Device Modeling to contact Geoffrey
> Coram (geoffrey.coram@analog.com). The device modeling activity would be
> handed as a seperate technical working group under the Verilog-AMS
> committee. The leader for the working group would be identifed once the
> list of people working on the technical group has been identified. The
> purpose of this working group would be to identify and recommend to the
> AMS committee the extensions need in Verilog-AMS language to support
> SPICE device level modeling. The device modeling call would be organized
> as a seperate call depending on the geographical location and
> convinience of the participants.
That committee should probably handle C/C++ interfacing to compiled
models too.
> * We would like to start a similar effort for the RF extensions to the
> language, and some of the people in this mailing list have shown
> interest in working on the RF/MEMS extensions. I do not have a contact
> person identified yet for the RF efforts. If anyone in this list is
> willing & interested to be the initial contact for this effort, could
> they get in touch with me.
For those not involved in SystemVerilog, the LRM(s) are available through
the SV-EC website - http://www.eda.org/sv-ec/ . Part of the approach to
providing RF support may be adding complex arithmetic and FFT functions to
SV, which would allow behavioral system-level design descriptions that don't
require the use of solvers (the baseband logic event rate correlates to the
RF spectral event rate). RF modelling of devices in Verilog-A is a seperate
issue and requires expertise in harmonic-balance and other simulator
techniques (that I don't have). Whether we want to tackle these issues in
one sub-committee or two is open to debate :-)
BTW, what does MEMS need that isn't in Verilog-A already? - RF adds frequency
domain (to discrete and continuous).
Regards,
Kev.
> * The Verilog-AMS technical working group would be going through the
> list of open issues identified in Annex G of LRM2.1 and start
> idenitifying tasks and working on some of these open issues.
>
> * My apologies for not sending the conference call details along with
> the notification of the committee call.
>
> Next Verilog-AMS call: 14th April, 4:30pm, US PST
> Dialin Number: +1-334-309 0262 (Intl)
> +1-866-779 0773 (US)
> Pin number: *3589511* (Including the *)
>
> cheers,
> Sri
>
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