Re: Minutes of: Verilog-AMS LRM Device Modeling Subcommittee Meeting May 6


Subject: Re: Minutes of: Verilog-AMS LRM Device Modeling Subcommittee Meeting May 6
From: Kevin Cameron x3251 (Kevin.Cameron@nsc.com)
Date: Tue May 06 2003 - 12:22:50 PDT


> From: "Geoffrey.Coram" <Geoffrey.Coram@analog.com>
...
>
>
> 1. Introductions
>
> Attendees discussed their involvement with Verilog-AMS;
> the two main camps were (a) those in device modeling groups
> that do the hand-coding in C and (b) those in simulator
> groups implementing Verilog-AMS for customer use.
>
>
...
>
>
> 3. Goals
>
> The attendees were asked, "What should an extension for device modeling do?"
>
> Geoffrey Coram: Extensions should help make a device model written in
> Verilog-AMS as efficient and fast as one coded natively in C/C++

Is anyone interested in defining an API so that C/C++ models can be
used directly? It would seem to be a simpler way to re-use existing
models and to provide IP protection for folks who don't want to share
source. I presume most folks who are building Verilog-A/MS simulators
are converting the Verilog source into C/C++ anyway so it wouldn't
be to hard to do a "<compile> -portable" to get API compliant models.

The SystemVerilog CC committee has already done some work on a more
efficient C interface which could be used as a starting point - it'll
probably work better for AMS than it does for SystemVerilog :-)

Regards,
Kev.

>....



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