Subject: minutes of: V-AMS DevModeling meeting Oct 21
From: Geoffrey.Coram (Geoffrey.Coram@analog.com)
Date: Thu Oct 23 2003 - 14:48:34 PDT
October 21 minutes of Verilog-AMS Device Modeling Extensions
subcommittee
Attendees:
Geoffrey Coram, Analog Devices
Ilya Yusim, Cadence
Jeroen Paasschens, Philips
John Moore, Agilent
Laurent Lemaitre, Motorola
Colin McAndrew, Motorola
Marek Mierzwinski, Tiburon
Boris Troyanovsky, Tiburon
Peter Liebmann, Xpedion
Jim Barby, U Waterloo
Al Davis, Kettering U
----1) Approval of previous minutes Sept 23, Oct 8
2) Model Cards / Paramsets
The paramset proposal is on the designers-guide web site. The main idea is that we need to propose some standard syntax for Verilog netlists that will cover the functionality of the Spice .model card. We hope to do it in such a way that we can suggest how a simulator vendor might interpret a .model card for a Verilog-A compact model in a Spice netlist.
Jim pointed out that large mos circuits with lots of devices having the same l and w are not handled well in the current Spice .model card. Since paramsets can reference other paramsets, one could make a paramset for a specific l and w that referenced the main mos paramset and get better efficiency.
Someone mentioned that Cadence's original Verilog specification had something to say about model cards, but this was ultimately not included in the IEEE standard. Ilya promised to look into the issue.
3) M-factor and rmin
Rmin sets a minimum resistance to avoid convergence problems in Spice-like simulators (large conductance in the Jacobian matrix and finite-precision arithmetic). We want the simulator to handle the m-factor automatically, but the model writer needs to handle parasitic resistances that end up below the threshold due to m.
I proposed $m_scaled_value_above(value, thresh, expon) which returns (value*m**expon > thresh). With this, one could do parasitic resistors as well as capacitors, etc. It's rather verbose; I'm open to a cleaner name.
We probably can't expect the simulator to detect when a resistor is parasitic; in particular, it might be a nonlinear resistor that is nevertheless negligible in some cases. Also, in power electronics, small resistors are important, and we want to allow maximum control over when they are elimimated. Rmin should be an instance parameter, not just a global option to the simulator.
Jeroen took issue with vendors implementing rmin differently; this conflicts with the idea of a standard model. However, Colin pointed out that "standard" models won't give the same answer on HP, Sun, Linux; with different compiler optimization levels (-O2); etc. You have to accept the numerical differences, including those due to rmin and gmin.
-- Geoffrey J. Coram, Ph.D. Senior CAD Engineer Analog Devices, Inc. Geoffrey.Coram@analog.com 804 Woburn St., MS-422, Tel (781) 937-1924 Wilmington, MA 01887 Fax (781) 937-1014
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