Subject: RE: VerilogAMS LRM Committee Meeting Reminder
From: Chandrasekaran Srikanth-A12788 (Srikanth.Chandrasekaran@motorola.com)
Date: Sun Dec 14 2003 - 15:28:44 PST
Hi all,
Sorry I had the reference to the wrong document in the previous mail regarding meeting notification. The device modelling proposal document could be found at:
http://www.eda.org/verilog-ams/htmlpages/public-docs/Verilog-A_compact_Model_Extensions.pdf
Regards,
Sri
> -----Original Message-----
> From: owner-verilog-ams@eda.org
> [mailto:owner-verilog-ams@eda.org] On Behalf Of
> Chandrasekaran Srikanth-A12788
> Sent: Monday, December 15, 2003 9:55 AM
> To: 'Verilog-AMS LRM Committee'
> Subject: VerilogAMS LRM Committee Meeting Reminder
>
>
> Hi all,
>
> The next committee meeting is scheduled for 8th December,
> 4:30PM PST. The dialin numbers (thanks to cadence) are:
>
> DIAL-IN NUMBERS & PASSCODES:
> --------------------------------------------
> USA Toll Free Number: 877-346-8823
> USA Toll Number: +1-203-320-0407 (for international call-in)
> PARTICIPANT PASSCODE: 602538
>
> We will be going through the extensions to Verilog-A
> currently being discussed and proposed in the Device Modeling
> subcommittee. The actual technical details of the proposal
> and the individual extensions are being discussed as part of
> the subcommittee. Tomorrow's meeting will go through the
> syntax and extensions being proposed in the context of the
> VerilogAMS BNF work being discussed.
>
> For details of the document and for the Device Modeling
> proposal itself please refer:
> http://www.eda.org/verilog-ams/htmlpages/public-docs/syntax_2_
1_updated.pdf
Regards,
Sri
-- Srikanth Chandrasekaran Global Software Group, EDA Motorola, Australia Ph: +61-8-8168 3592 Fax: 3501
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