Subject: VerilogAMS LRM Committee Meeting Reminder
From: Chandrasekaran Srikanth-A12788 (Srikanth.Chandrasekaran@motorola.com)
Date: Sun Jan 11 2004 - 23:11:13 PST
Hi all,
Greetings and Wish you all a very happy New year.
The next committee meeting is scheduled for 12 January 2004, 4:30PM PST. The dialin numbers (thanks to cadence) are:
DIAL-IN NUMBERS & PASSCODES:
--------------------------------------------
USA Toll Free Number: 877-346-8823
USA Toll Number: +1-203-320-0407 (for international call-in)
PARTICIPANT PASSCODE: 602538
We will be continuing with the extensions to Verilog-A currently being discussed and proposed in the Device Modeling subcommittee. The actual technical details of the proposal and the individual extensions are being discussed as part of the subcommittee. The meeting will go through the syntax and extensions being proposed in the context of the VerilogAMS BNF work being discussed.
For details of the document and for the Device Modeling proposal itself please refer:
http://www.eda.org/verilog-ams/htmlpages/public-docs/syntax_2_1_updated.pdf
Regards,
Sri
-- Srikanth Chandrasekaran Global Software Group, EDA Motorola, Australia Ph: +61-8-8168 3592 Fax: 3501
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