Planning for LRM 2.3

Hi all,

Its been a while since we approved/accepted LRM2.2 to be sent to the board. The plan is for the Accellera Board to make a decision probably within the next week or two. I was initially thinking of having the planning meeting for LRM2.3 once the board approval is got, but given that slowly I am seeing more discussions on the reflector also on topics that need addressing, but I feel that we start doing some of the initial planning on what we want to address for the next iteration.

I am planning to schedule an LRM meeting on the 15th of November, 4:30 US Pacific time.

The rough agenda/plan for LRM 2.3 from the list I have are the following:
* Merge with IEEE 2001 standard (for which quite an amount of work has already been invested, and the draft is in good shape)
* Resolve the keyword conflict in discipline logic with SV
* Updates to $table_model proposal.
* Extend mixed signal analysis scheduling semantics and algorithm for non transient analysis (DCSweep, AC, Noise etc)

Ofcourse there is the open issue of SystemVerilog integration with VerilogAMS, and the more its delayed the mode difficult and divergent that the languages are going to become. I am discussing this issue with Vassillios and if I have any feedback we can discuss that further during the committee call.

Regards,
Sri

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Srikanth Chandrasekaran
Freescale Semiconductors, Australia
Ph: +61-8-8168 3592 Fax: 3501