RE: math functions in 1364

Using $<math func> seems like a bad idea to me, regular Verilog usually
treats those kind of things as user-supplied or user-replaceable. You'd
be as well off using the SV DPI interface and just calling the C math
functions directly - you can skip the '$' then.

Kev.

-----Original Message-----
From: owner-verilog-ams@eda.org [mailto:owner-verilog-ams@eda.org] On
Behalf Of Geoffrey.Coram
Sent: Wednesday, December 01, 2004 9:29 AM
To: VerilogAMS Reflector
Cc: Steven Sharp
Subject: math functions in 1364

The 1364 BTF just passed an issue adding most of the
math functions from AMS:

http://www.boyd.com/1364_btf/report/full_pr/390.html

However, you have to call them with a leading $ --
eg, $sqrt(4.0).

Also, abs min max were left out (intentionally).

Steven Sharp, who wrote the proposal that was passed, says
he hopes AMS will move to using the $, and suggests that
perhaps an `include file for AMS can define functions
without the $ that map to the $functions for user convenience.

I'm not quite sure how that will work: since analog functions
must be declared inside a module, you would have to `include
the mappings inside the module, as opposed to putting all your
`includes at the top of the file. (Why, actually, are those
functions restricted to module scope, but then forbidden to
know anything about the module? Eg, they can't access
parameters or ports of the module.)

Also,
  `define abs(x) (((x) > 0) ? (x) : -(x))
doesn't work, because you'd then have to invoke it with `abs(x)

Lastly, the approved proposal sets up $ln and $log10, to avoid
the confusion of log, which means natural log in C, Matlab, etc.
but log10 in Verilog-AMS.

-Geoffrey

-- 
Geoffrey J. Coram, Ph.D.    Senior CAD Engineer     
Analog Devices, Inc.        Geoffrey.Coram@analog.com 
804 Woburn St., MS-422,     Tel (781) 937-1924
Wilmington, MA 01887        Fax (781) 937-1014