Re: Verilog-AMS examples

David,

Looking at my notes, they came from Peter Liebmann who got them from the 
original OVI website.   It was never clear whom was the original source as 
many look similar to the basic examples Cadence ships but there are 
examples unique to both of these libraries so it might just be that most of 
these are pretty common.  I know we include testfixtures with our libs but 
don't know if there were ever testbenches with the ones on OVI's or now 
eda.org's site.  Most of these examples have ideal inputs and outputs which 
if not modified tends to lead to bad results in real circuits also.

Always something we wanted to clean up for sure.

Jon


At 07:51 PM 3/8/2005, edaorg@v-ms.com wrote:
>From: "David W. Smith" <David.Smith@synopsys.com>
>
>Greetings,
>Does anyone know where the example on the web site came from? They seem to
>be missing any testbenches or descriptions that indicate their intended use.
>It would be helpful to have more information to go with them.
>
>Regards
>David
>
>David W. Smith
>Synopsys Scientist
>
>Synopsys, Inc.
>Synopsys Technology Park
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>Hillsboro, OR 97124
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>
>
>
>
>----- End Included Message -----

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