Hi all, I am cancelling tommorrow's VerilogAMS LRM meeting. Next meeting is scheduled for 25th April 2005. The tentative agenda is: * Feedback/discussions/followup on the SV-AMS workshop held on 13th April 2005 * Any updates to table_model proposal with details from the last meeting * Mixed Signal AC/DC Sweep analysis proposal - We have been working on an initial proposal enhancing the language to support mixed signal AC and DCSweep analysis. Prasanna will send out this proposal very soon. Time: 3:30pm Pacific Time would correspond to 8:00am Adelaide time. However I am not sure how early/late this is in Europe. Marq - Would this time be feasible for you? Regards, Sri -- Srikanth Chandrasekaran Freescale Semiconductors, Australia Ph: +61-8-8168 3592 Fax: 3501Received on Mon Apr 4 03:02:01 2005
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