RE: Notes from my discussion with Johny Srouji (Accellera Technical Chair)

Re-posted for Johny:

> To: Chandrasekaran Srikanth-A12788 <Srikanth.Chandrasekaran@freescale.com>,
        "'Kevin Cameron'" <kevin@sonicsinc.com>
> Cc: Verilog-A Reflector <verilog-ams@server.eda.org>
> Subject: RE: Notes from my discussion with Johny Srouji (Accellera Technical Chair)
> From: Johny Srouji <srouji@us.ibm.com>
> Date: Wed, 31 Aug 2005 09:12:24 -0500
>
> Sri, Kevin, Hi,
> 
> I want to make sure we are all clear on this - here is my take:
> 
> There is NO contradiction between Verilog-2005 and SystemVerilog - they
> are actually both under the same WG now (P1800). Long term, both LRM's
> will converge into a single one. That was discussed and agreed upon in the
> P1800 WG, but it was understood that for the short term we need to refine
> the latest Verilog version and get SystemVerilog LRM out and approved as
> an IEEE standard. We also kept in mind and as part of our goals, that we
> will not create "conflicts" between the two languages.
> 
> Under the same spirit, I also think that Verilog-AMS is a step in the
> right direction and goal which is SystemVerilog-AMS. Therefore, I would
> assume and expect (Sri - please confirm) that any work that is done for
> Verilog-AMS would not make it harder to develop SystemVerilog-AMS but the
> contrary. I want the committee to keep SystemVerilog-AMS in mind - this is
> the goal.
> 
> Also, given the install base and usage of Verilog vs. SystemVerilog, I
> think it makes sense to start w/ the Verilog version and then migrate to
> SystemVerilog. I expect two things to happen here: 1) the Verilog-AMS work
> will not take too long (I will follow-up w/ Sri on the schedule) and 2)
> SystemVerilog-AMS is kept in mind when making design decisions. I see no
> conflict from the vendors perspective either - they will have to support
> both of these implementations anyway.
> 
> As for P1800 (which I also chair), I will make sure that SystemVerilog-AMS
> is on our next WG F2F meeting agenda (mid October), after which I will
> work w/ Sri on a detailed plan and schedule for this work. As for the
> structure, I would still like this work to be done under the AMS committee
> (versus merging it into P1800 or Verilog P1364) but will probably assign a
> liaison person between the two groups to make sure we're aligned.
> 
> Hope this clarifies this important topic. Thanks,
> 
> --- Johny.