Hi, Marq. Regarding defparams, you are correct that it has fallen in disfavor. Personally, I think the community has exaggerated in its disfavor. Like any other construct, you need to use it wisely. I think it is possible to have lint tools check for unsafe uses. I realize I may be in a small minority here, but I think I represent a large group of responsible users which is simply not well represented on this point in the standards committees. However, I think the statement that defparam is not widely supported by simulators is not correct. I don't know of any significant digital Verilog simulator which does not support it. Regarding #2, I meant something like the following. I'll use a digital Verilog example. module qq; parameter N = 3; parameter M = 5; parameter P=2; function [N:1] gg (input [M:1] ii); reg[P:1] aa ; ... endfunction module top; gg #(.N(2),.M(7),.P(1)) gg(7'd33); ... endmodule Shalom ________________________________ From: owner-verilog-ams@eda.org [mailto:owner-verilog-ams@eda.org] On Behalf Of Marq Kole Sent: Monday, September 19, 2005 11:05 AM To: verilog-ams Subject: RE: Analog function question Shalom, > Re the statement that "you cannot set a parameter value (of a > function) from the outside", > I think there are 2 ways that you CAN do it: > > 1. defparam You're right, but I think defparam has fallen in disfavor with at least the SV community and it is not widely supported by simulators. > 2. Use a parameter which is defined in the module enclosing the > function. That parameter value CAN be overridden. But then it is not longer the same parameter anymore, it is just a local parameter which happens to share the same name. Per 4.6.1 it can only reference local variables or variables passed in as arguments; the whole paragraph does not mention parameters anywhere. Or, is this what you mean: module test_me (a, b); parameter integer n = 2 from [0:inf); inout[0:n-1] a, b; electrical[0:n-1] a, b; analog function integer some_array_manip; parameter integer n = n; inout[0:n-1] a; ... endfunction ... endmodule The reference to parameters of the enclosing module is not mentioned in 4.6 explicitly, but the above looks acceptable to me. I stand corrected :-) Regards, Marq > > Shalom > > > > From: owner-verilog-ams@eda.org [mailto:owner-verilog-ams@eda.org] > On Behalf Of Marq Kole > Sent: Friday, September 16, 2005 10:28 AM > To: verilog-ams > Subject: Re: Analog function question > > > Oops, need to correct a small mistake below: > > > Sri, Arpad, > > > > > In strict accordance to the BNF it cant be done yet. I think it was > > > an oversight/bug in the BNF and the intent was to put it in there. > > > > In accordance with the BNF, the input declaration is mentioned as a > > digital_input_declaration in Annex A, so its actual definition is in the > > IEEE 1394-1995 standard. See Mantis item #870. > > > > For array arguments see Mantis item #869 describing the problem - it is > > rather an issue of documentation (explanation + example) than a missing > > item in the standard. > > > > > > > > regards, > > > Sri > > > > > > Muranyi, Arpad wrote: > > > Sri, > > > > > > I just saw your 2nd reply, but since I had this almost finished, > > > I will send it out anyway... So according to your 2nd message, > > > this can't be done (yet)? > > > ---------------------------- > > > Thanks for the quick answer. Sorry, but I am still not sure > > > about it. The sections you quoted from the LRM seem to allow > > > the array inside the function as a block item, but I still > > > don't see how I can pass an array into the function (and > > > pass it as a real variable array, not as a parameter array). > > > > Parameter arrays in functions wouldn't help you anyway, as you > > cannot set them from outside the function, and once initialized, > > you cannot alter them from inside the function either. > > > > > Would you be so kind and help me with an example? If the > > > input "in1" is an array, how would you declare it in the > > > function? > > > > > > analog function real myFunctionName; > > > input in1; > > > real in1[1:5]; <--------- How would I know the size? > > > > You'd know the size as the above analog function declaration tells > > you the size. There is at this moment no way to make an array argument > > with parameter-controlled size in an analog function in Verilog-AMS -- > > I mean an argument-controlled size given the fact that you cannot set > a parameter value from the outside. So a call: > > myArrayFunction(myArraySize, myArray); > > Where myArraySize argument carries the length of the myArray argument > cannot be handled in current Verilog-AMS. > > > we need to check what System-Verilog does to resolve that for a future > > LRM, I think. > > > > > begin > > > ... > > > ... > > > end > > > endfunction > > > > > > > > > Thanks, > > > > > > Arpad > > > > Marq Kole > > Competence Leader Analog Simulation, Philips ED&TReceived on Mon Sep 19 01:25:55 2005
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