RE: request $fdebug system task

From: Martin O'Leary <oleary_at_.....>
Date: Mon Dec 12 2005 - 11:48:20 PST
Marq,
I am assigned Chap10 in the LRM2.3-V2005 sync, I am happy to add $fdebug
to the proposed LRM2.3-Chapter10 as it seems to be an obvious omission
in the $debug functionality. The committee can approve/disapprove
$fdebug as part of their review of Chapter 10. However can give me the
Mantis entry for it for tracking purposes?
 
Re: the other issue raised on this thread;
"We don't have the equivalent of C's ... argument handling in
Verilog-AMS or SystemVerilog which would make it easier to write your
own routines for this kind of thing. Maybe we should just add something
like that which might be more generally useful."
 
My take is that this sounds like it is beyond the scope of LRM2.3 (sync
with V2005, fix errors) and LRM3.0 (sync with System Verilog).
 
Thanks,
--Martin


________________________________

	From: owner-verilog-ams@eda.org
[mailto:owner-verilog-ams@eda.org] On Behalf Of Marq Kole
	Sent: Friday, December 09, 2005 12:37 AM
	To: verilog-ams
	Subject: request $fdebug system task
	
	

	All, 
	
	On behalf of the compact device modelling group in Philips
Research I have the request for a $fdebug system call. This would
essentially be the same as the $debug system call, but writing to
specified file instead of the regular (simulator-dependent) output. The
rationale behind this is in separating $debug calls from several
devices, allowing regression testing of model performance vs. simulation
algorithm, and more efficient post-processing of large amounts of data
from $debug calls. 
	
	Here is an example of such use: 
	
	        integer fp; 
	
	        analog begin 
	          @(initial_step) 
	            fp = fopen("mosmodel.debug"); 
	
	          ... 
	          $fdebug(fp, "%M: Ids = %g", I(ds)); 
	          ... 
	
	        end 
	
	Before I make an entry in the Mantis database, I would like to
know whether this would be an acceptable proposal. 
	
	Regards, 
	Marq 
	
	
	Marq Kole
	Competence Leader Analog Simulation, Philips ED&T
	
Received on Mon Dec 12 11:48:36 2005

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