Geoffrey.Coram wrote: >Kevin - >In this case, the 1364 LRM would have introduced more confusion. >In 4.5.2 (1364-2005_D3.pdf, the latest I have that's not >encrypted), I see the following as a step to evaluating an >expression: > >- Coerce the type of each operand of the expression > (excepting those which are self-determined) to the type > of the expression. > >I think this conflicts with C and Verilog-AMS. In C, if you >write > double a; > a = 1/5; >then 1/5 is an integer division and evaluates to zero, this >(integer) zero is then converted to a double to store in "a" >Maybe I missed where "self-determined" is talked about. > > Like I said, it would be bad if the LRMs are inconsistent, however I ran the code snippet in a Verilog simulator and it gave a = 0 so it appears that they are all consistent. I think that (in the languages I know) coercion generally only takes place on the results of an operation, but the operation may be overloaded wrt to the operands, i.e. what is on the LHS of an assignment does not affect the RHS evaluation, coercion is part of the assignment operation itself. Kev. >This section is well after the part about arithmetic operators >(4.1.5), which has the following sentences: > > The integer division shall truncate any fractional part toward > zero. For the division or modulus operators, if the second > operand is a zero, then the entire result value shall be x. > >1364 doesn't define what "integer division" is, and it seems >to say you get "x" (unknown) for division by zero. > >-Geoffrey > > > > > >Kevin Cameron wrote: > > >>I would have said that if you are in doubt reading the AMS LRM for this >>kind of thing then look for the information in the 1364 LRM - it would >>be bad if they are inconsistent :-) >> >>Kev. >> >> > > >Received on Wed Dec 14 10:36:19 2005
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