Re: Compilation question

From: Jonathan David <j.david_at_.....>
Date: Wed Jan 04 2006 - 08:16:25 PST
And if its taken from 1364-1995 the ONLY runtype that
would have been considered would a single transient
run.. the only type of analysis considered for a logic
simulator. In that context "compilation" is probably
everything you do before you start evaluating the
values of signals at time 0.
It was not necessarily the "reduction to executable
code" usually implied by software folks but more
literally the phase of "piling together" the design
prior to running.

some vendor might get the bright idea for an
interactive run where, at a stop point, a parameter
value can be modified, and a new run started where the
old one left off (and with the initial conditions the
same as the final conditions of the other run, and the
start time the same as the end time of the other run,
writing to the same results database wouldn't violate
this paragraph.. IOW, allowing the design to be
recompiled, apparently in the middle of a run.. 

would this be a bad idea?
 

Jonathan

--- "Geoffrey.Coram" <Geoffrey.Coram@analog.com>
wrote:

> Shalom -
> There is perhaps a difference in understanding of
> what "compilation"
> means.  In the Verilog-A compact modeling world, we
> have these
> very complicated modules that get "compiled" from
> Verilog-A to
> C and then to object code that is dynamically linked
> into the
> simulator.  This is somewhat different from the
> "compilation"
> that I think digital Verilog simulators do when they
> set up
> a particular netlist to run (and run quickly).
> 
> LRM 2.2 does, indeed, have that paragraph -- taken
> directly
> from 1364-1995 (section 3.10).  All the analog
> simulators
> I've used take that with a nudge and a wink and
> allow the
> parameter value to be changed.  Of course, since the
> 1364
> LRM doesn't know what a "dc sweep" is, one could
> argue that
> a "dc sweep" is really a set of runs, in each of
> which the
> parameter value is constant.  I believe there are
> open issues
> for Verilog-AMS about cleaning up the mixed-signal
> initialization
> and fully explaining what a "dc sweep" means.
> 
> -Geoffrey
> 
> 
> "Bresticker, Shalom" wrote:
> > 
> > On the contrary, the 2.2 LRM says,
> > 
> > "Parameters represent constants, hence it is
> illegal to modify their
> > value at runtime. However, parameters can be
> modified at compilation
> > time to have values which are different from those
> specified in the
> > declaration assignment. This allows customization
> of module instances. A
> > parameter can be modified with the defparam
> statement or in the
> > module_instance statement."
> > 
> > A -defparam on the command line is just a
> substitute for a defparam
> > statement in the code. It is still evaluated at
> compilation time.
> > 
> > You should have some basic understanding of what
> compilers do.
> > Among others things, compilers translate the
> source code into a data
> > structure. Changing the data structure requires a
> recompilation. It may
> > be an incremental recompilation, but a
> recompilation nevertheless.
> > 
> > There might be special cases of parameters which
> you could change
> > without requiring a recompilation, such as a
> transistor value, but that
> > is not changing the data structure.
> > 
> > Shalom
> 
Received on Wed Jan 4 08:16:32 2006

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