Hi all, Well... I have been out of the loop on the committee work for the past few months. There have been some discussions ongoing in the reflector, but there haven't been any committee meetings for the past several weeks after we broke off for christmas few months ago. Hopefully, we can start having our regular meetings next week onwards (March 21st). I will send a agenda about the topics we would like to cover - but the most important would be the current work on LRM2.3, with 1364-2005 syntax merger. For sure, we will not be able to address this for the June/July time frame. I would like to revisit the plans for this and see how we are going to go ahead with this work, and also how it aligns with the SystemVerilog integration work (& IEEE donation). The BNF for the merged analog/digital syntax that Graham has been working on is fairly good shape but we have lot of work in the individual sections including sorting out the semantics of the new syntax that has been adapted, which will in require updates to the BNF. I will send a more detailed agenda later this week. Regards, Sri -- Srikanth Chandrasekaran DTO, Tools Group Freescale Semiconductor Ph: +61-(0)8-8168 3592 Fax: x3201Received on Tue Mar 14 00:09:29 2006
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